device: Use pcidev_on_root()

Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

66 files changed, 117 insertions, 115 deletions

diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index 1ddcb1c123..c805015088 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -120,7 +120,7 @@ static AGESA_STATUS board_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr)
 	int spdAddress;
 	AGESA_READ_SPD_PARAMS *info = ConfigPtr;
 
-	DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+	DEVTREE_CONST struct device *dev = pcidev_on_root(0x18, 2);
 	DEVTREE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info;
 	UINT8 spdAddrLookup_rev_F [2][2][4]= {
 		{ {0xA0, 0xA2}, {0xA4, 0xAC}, }, /* socket 0 - Channel 0 & 1 - 8-bit SPD addresses */
diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c
index e541c0ad3a..7c35f97c9b 100644
--- a/src/mainboard/amd/bettong/mptable.c
+++ b/src/mainboard/amd/bettong/mptable.c
@@ -108,7 +108,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/gardenia/mptable.c b/src/mainboard/amd/gardenia/mptable.c
index 0cda7f7676..428e5751f8 100644
--- a/src/mainboard/amd/gardenia/mptable.c
+++ b/src/mainboard/amd/gardenia/mptable.c
@@ -113,7 +113,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c
index 6071868521..8d1ec59d9c 100644
--- a/src/mainboard/amd/inagua/mptable.c
+++ b/src/mainboard/amd/inagua/mptable.c
@@ -101,7 +101,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 9c357f9750..e2bc54eded 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -31,7 +31,7 @@ void set_pcie_dereset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word |= (1 << 0) | (1 << 2);	/* Set Gpio6,4 as output */
@@ -44,7 +44,7 @@ void set_pcie_reset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word &= ~((1 << 0) | (1 << 2));	/* Set Gpio6,4 as output */
@@ -64,13 +64,13 @@ static void get_ide_dma66(void)
 	/*u32 sm_dev, ide_dev; */
 	struct device *sm_dev, ide_dev;
 
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	byte = pci_read_config8(sm_dev, 0xA9);
 	byte |= (1 << 5);	/* Set Gpio9 as input */
 	pci_write_config8(sm_dev, 0xA9, byte);
 
-	ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
+	ide_dev = pcidev_on_root(0x14, 1);
 	byte = pci_read_config8(ide_dev, 0x56);
 	byte &= ~(7 << 0);
 	if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))
diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c
index c94c9c8617..c87749e2d4 100644
--- a/src/mainboard/amd/olivehill/mptable.c
+++ b/src/mainboard/amd/olivehill/mptable.c
@@ -175,7 +175,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/olivehillplus/mptable.c b/src/mainboard/amd/olivehillplus/mptable.c
index 6c3b05abde..cc5fa304a2 100644
--- a/src/mainboard/amd/olivehillplus/mptable.c
+++ b/src/mainboard/amd/olivehillplus/mptable.c
@@ -136,7 +136,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c
index e75181184c..a7d47c2cdd 100644
--- a/src/mainboard/amd/parmer/mptable.c
+++ b/src/mainboard/amd/parmer/mptable.c
@@ -136,7 +136,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c
index 31e8264344..2b2d05abe1 100644
--- a/src/mainboard/amd/persimmon/mptable.c
+++ b/src/mainboard/amd/persimmon/mptable.c
@@ -106,7 +106,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_E]);	/* Use INTE */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c
index 259e1f40a9..8052dc0d67 100644
--- a/src/mainboard/amd/south_station/mptable.c
+++ b/src/mainboard/amd/south_station/mptable.c
@@ -97,7 +97,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c
index 0c487c5b17..403a282d55 100644
--- a/src/mainboard/amd/thatcher/mptable.c
+++ b/src/mainboard/amd/thatcher/mptable.c
@@ -136,7 +136,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index 5c052ec829..ec0144aac4 100644
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -50,7 +50,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -76,7 +76,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -92,7 +92,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
@@ -130,7 +130,7 @@ static void set_gpio40_gfx(void)
 	pm2_iowrite(0xf1, byte);
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/*if the dev3 is present, set the gfx to 2x8 lanes*/
 	/*otherwise set the gfx to 1x16 lanes*/
@@ -190,7 +190,7 @@ static void set_thermal_config(void)
 	pm2_iowrite(0x42, byte);
 
 	/* set GPIO 64 to input */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x56);
 	word |= 1 << 7;
 	pci_write_config16(sm_dev, 0x56, word);
diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c
index 4e0b8f1e71..2219d01d75 100644
--- a/src/mainboard/amd/torpedo/mptable.c
+++ b/src/mainboard/amd/torpedo/mptable.c
@@ -179,7 +179,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 
diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c
index 259e1f40a9..8052dc0d67 100644
--- a/src/mainboard/amd/union_station/mptable.c
+++ b/src/mainboard/amd/union_station/mptable.c
@@ -97,7 +97,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c
index b78a3ed9e3..1d3598215c 100644
--- a/src/mainboard/aopen/dxplplusu/fadt.c
+++ b/src/mainboard/aopen/dxplplusu/fadt.c
@@ -32,7 +32,7 @@
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
-	u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
+	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c
index 54762d41ad..9c62712aa2 100644
--- a/src/mainboard/asrock/e350m1/mptable.c
+++ b/src/mainboard/asrock/e350m1/mptable.c
@@ -100,7 +100,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c
index 8e1b1c1b66..b64198092e 100644
--- a/src/mainboard/asrock/imb-a180/mptable.c
+++ b/src/mainboard/asrock/imb-a180/mptable.c
@@ -176,7 +176,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c
index d97663d89e..0811fd2e1c 100644
--- a/src/mainboard/asus/f2a85-m/mptable.c
+++ b/src/mainboard/asus/f2a85-m/mptable.c
@@ -142,7 +142,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/asus/kcma-d8/acpi_tables.c b/src/mainboard/asus/kcma-d8/acpi_tables.c
index c1006e5e7c..ef074608af 100644
--- a/src/mainboard/asus/kcma-d8/acpi_tables.c
+++ b/src/mainboard/asus/kcma-d8/acpi_tables.c
@@ -41,7 +41,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 					   IO_APIC_ADDR, gsi_base);
 	/* IOAPIC on rs5690 */
 	gsi_base += 24;		/* SB700 has 24 IOAPIC entries. */
-	dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	dev = pcidev_on_root(0, 0);
 	if (dev) {
 		pci_write_config32(dev, 0xF8, 0x1);
 		dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
diff --git a/src/mainboard/asus/kcma-d8/mainboard.c b/src/mainboard/asus/kcma-d8/mainboard.c
index 8da41b085b..729ad35b13 100644
--- a/src/mainboard/asus/kcma-d8/mainboard.c
+++ b/src/mainboard/asus/kcma-d8/mainboard.c
@@ -28,7 +28,7 @@ void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
 }
@@ -37,7 +37,7 @@ void set_pcie_dereset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
 }
diff --git a/src/mainboard/asus/kcma-d8/mptable.c b/src/mainboard/asus/kcma-d8/mptable.c
index 44ba1567ae..54cf5edb69 100644
--- a/src/mainboard/asus/kcma-d8/mptable.c
+++ b/src/mainboard/asus/kcma-d8/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 			 * 00:14.6: INTB MCI
 			 */
 		}
-		dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+		dev = pcidev_on_root(0, 0);
 		if (dev) {
 			pci_write_config32(dev, 0xF8, 0x1);
 			dword_ptr = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
@@ -125,32 +125,32 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((11)<<2)|(0)), apicid_sr5650, 30);	/* Device 11 (LNKG, APIC pin 30) */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((12)<<2)|(0)), apicid_sr5650, 30);	/* Device 12 (LNKG, APIC pin 30) */
 
-	dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
+	dev = pcidev_on_root(0x2, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x2)|(0)), apicid_sr5650, 0);	/* card behind dev2 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x4, 0));
+	dev = pcidev_on_root(0x4, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x4)|(0)), apicid_sr5650, 0);	/* PIKE */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x9, 0));
+	dev = pcidev_on_root(0x9, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x9)|(0)), apicid_sr5650, 23);	/* NIC A */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xa, 0));
+	dev = pcidev_on_root(0xa, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xa)|(0)), apicid_sr5650, 24);	/* NIC B */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xb, 0));
+	dev = pcidev_on_root(0xb, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xb)|(0)), apicid_sr5650, 0);	/* card behind dev11 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xc, 0));
+	dev = pcidev_on_root(0xc, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xc)|(0)), apicid_sr5650, 0);	/* card behind dev12 */
@@ -177,7 +177,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(sp5100_bus_number, 0x11, 0x0, 0x16); /* 6, INTG */
 
 	/* PCI slots */
-	dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 
diff --git a/src/mainboard/asus/kfsn4-dre/acpi_tables.c b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
index 36f55afd47..e5e2613f28 100644
--- a/src/mainboard/asus/kfsn4-dre/acpi_tables.c
+++ b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
@@ -38,7 +38,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 	current = acpi_create_madt_lapics(current);
 
 	/* Write NVIDIA CK804 IOAPIC. */
-	dev = dev_find_slot(0x0, PCI_DEVFN(sysconf.sbdn + 0x1, 0));
+	dev = pcidev_on_root(sysconf.sbdn + 0x1, 0);
 	ASSERT(dev != NULL);
 
 	res = find_resource(dev, PCI_BASE_ADDRESS_1);
diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c
index c1006e5e7c..ef074608af 100644
--- a/src/mainboard/asus/kgpe-d16/acpi_tables.c
+++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c
@@ -41,7 +41,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 					   IO_APIC_ADDR, gsi_base);
 	/* IOAPIC on rs5690 */
 	gsi_base += 24;		/* SB700 has 24 IOAPIC entries. */
-	dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	dev = pcidev_on_root(0, 0);
 	if (dev) {
 		pci_write_config32(dev, 0xF8, 0x1);
 		dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index 14a4a69762..02859369af 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -28,7 +28,7 @@ void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
 }
@@ -37,7 +37,7 @@ void set_pcie_dereset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
 }
diff --git a/src/mainboard/asus/kgpe-d16/mptable.c b/src/mainboard/asus/kgpe-d16/mptable.c
index c1b2a5de5d..3b7ff52ab7 100644
--- a/src/mainboard/asus/kgpe-d16/mptable.c
+++ b/src/mainboard/asus/kgpe-d16/mptable.c
@@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v)
 			 * 00:14.6: INTB MCI
 			 */
 		}
-		dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+		dev = pcidev_on_root(0, 0);
 		if (dev) {
 			pci_write_config32(dev, 0xF8, 0x1);
 			dword_ptr = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
@@ -126,37 +126,37 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((12)<<2)|(0)), apicid_sr5650, 30);	/* Device 12 (LNKG, APIC pin 30) */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((13)<<2)|(0)), apicid_sr5650, 30);	/* Device 13 (LNKG, APIC pin 30)) */
 
-	dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
+	dev = pcidev_on_root(0x2, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x2)|(0)), apicid_sr5650, 0);	/* card behind dev2 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x4, 0));
+	dev = pcidev_on_root(0x4, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x4)|(0)), apicid_sr5650, 0);	/* PIKE */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0x9, 0));
+	dev = pcidev_on_root(0x9, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x9)|(0)), apicid_sr5650, 23);	/* NIC A */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xa, 0));
+	dev = pcidev_on_root(0xa, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xa)|(0)), apicid_sr5650, 24);	/* NIC B */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xb, 0));
+	dev = pcidev_on_root(0xb, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xb)|(0)), apicid_sr5650, 0);	/* card behind dev11 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xc, 0));
+	dev = pcidev_on_root(0xc, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xc)|(0)), apicid_sr5650, 0);	/* card behind dev12 */
 	}
-	dev = dev_find_slot(0, PCI_DEVFN(0xd, 0));
+	dev = pcidev_on_root(0xd, 0);
 	if (dev && dev->enabled) {
 		uint8_t bus_pci = dev->link_list->secondary;
 		smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xd)|(0)), apicid_sr5650, 0);	/* card behind dev13 */
@@ -183,7 +183,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(sp5100_bus_number, 0x11, 0x0, 0x16); /* 6, INTG */
 
 	/* PCI slots */
-	dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 
diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c
index b075c6938e..fb01236beb 100644
--- a/src/mainboard/asus/m4a78-em/mainboard.c
+++ b/src/mainboard/asus/m4a78-em/mainboard.c
@@ -40,7 +40,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -66,7 +66,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -84,7 +84,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c
index 53c97b8d43..6d0f5497d9 100644
--- a/src/mainboard/asus/m4a785-m/mainboard.c
+++ b/src/mainboard/asus/m4a785-m/mainboard.c
@@ -50,7 +50,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -76,7 +76,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -94,7 +94,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
@@ -136,7 +136,7 @@ static void set_thermal_config(void)
 	pm2_iowrite(0x42, byte);
 
 	/* set GPIO 64 to input */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x56);
 	word |= 1 << 7;
 	pci_write_config16(sm_dev, 0x56, word);
diff --git a/src/mainboard/bap/ode_e20XX/mptable.c b/src/mainboard/bap/ode_e20XX/mptable.c
index fc14165c2d..1808181cd8 100644
--- a/src/mainboard/bap/ode_e20XX/mptable.c
+++ b/src/mainboard/bap/ode_e20XX/mptable.c
@@ -104,7 +104,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_F]);
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/bap/ode_e21XX/mptable.c b/src/mainboard/bap/ode_e21XX/mptable.c
index 6c3b05abde..cc5fa304a2 100644
--- a/src/mainboard/bap/ode_e21XX/mptable.c
+++ b/src/mainboard/bap/ode_e21XX/mptable.c
@@ -136,7 +136,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/biostar/a68n_5200/mptable.c b/src/mainboard/biostar/a68n_5200/mptable.c
index c94c9c8617..c87749e2d4 100644
--- a/src/mainboard/biostar/a68n_5200/mptable.c
+++ b/src/mainboard/biostar/a68n_5200/mptable.c
@@ -175,7 +175,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/biostar/am1ml/mptable.c b/src/mainboard/biostar/am1ml/mptable.c
index 637ae9a1ec..6cb655ec09 100644
--- a/src/mainboard/biostar/am1ml/mptable.c
+++ b/src/mainboard/biostar/am1ml/mptable.c
@@ -104,7 +104,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_F]);
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/elmex/pcm205400/mptable.c b/src/mainboard/elmex/pcm205400/mptable.c
index 31e8264344..2b2d05abe1 100644
--- a/src/mainboard/elmex/pcm205400/mptable.c
+++ b/src/mainboard/elmex/pcm205400/mptable.c
@@ -106,7 +106,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_E]);	/* Use INTE */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c
index b8df5091a5..99184ca203 100644
--- a/src/mainboard/emulation/qemu-q35/acpi_tables.c
+++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c
@@ -44,7 +44,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
-	u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
+	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
 	header->length = sizeof(acpi_fadt_t);
diff --git a/src/mainboard/getac/p470/mainboard.c b/src/mainboard/getac/p470/mainboard.c
index 3e37ff8526..5d271fd65b 100644
--- a/src/mainboard/getac/p470/mainboard.c
+++ b/src/mainboard/getac/p470/mainboard.c
@@ -59,16 +59,16 @@ static void pcie_limit_power(void)
 
 	struct device *dev;
 
-	dev = dev_find_slot(0, PCI_DEVFN(28,0));
+	dev = pcidev_on_root(28, 0);
 	if (dev) pci_write_config32(dev, 0x54, 0x0010a0e0);
 
-	dev = dev_find_slot(0, PCI_DEVFN(28,1));
+	dev = pcidev_on_root(28, 1);
 	if (dev) pci_write_config32(dev, 0x54, 0x0018a0e0);
 
-	dev = dev_find_slot(0, PCI_DEVFN(28,2));
+	dev = pcidev_on_root(28, 2);
 	if (dev) pci_write_config32(dev, 0x54, 0x0020a0e0);
 
-	dev = dev_find_slot(0, PCI_DEVFN(28,3));
+	dev = pcidev_on_root(28, 3);
 	if (dev) pci_write_config32(dev, 0x54, 0x0028a0e0);
 #endif
 }
diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c
index 4c9799a510..d11deb082b 100644
--- a/src/mainboard/gigabyte/ma785gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gm/mainboard.c
@@ -40,7 +40,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -66,7 +66,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -106,7 +106,7 @@ static void set_gpio40_gfx(void)
 	pm2_iowrite(0xf1, byte);
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* set the gfx to 1x16 lanes */
 	printk(BIOS_INFO, "Dev3 is not present. GFX Configuration is One x16 slot\n");
diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c
index 5949741b45..3b4edeece0 100644
--- a/src/mainboard/gigabyte/ma785gmt/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c
@@ -50,7 +50,7 @@ void set_pcie_dereset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 1 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word |= (1 << 0);
 	word &= ~(1 << 4);
@@ -76,7 +76,7 @@ void set_pcie_reset(void)
 	pm_iowrite(0x94, byte);
 
 	/* set the GPIO65 output enable and the value is 0 */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x7e);
 	word &= ~(1 << 0);
 	word &= ~(1 << 4);
@@ -92,7 +92,7 @@ int is_dev3_present(void)
 	struct device *sm_dev;
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/* put the GPIO68 output to tristate */
 	word = pci_read_config16(sm_dev, 0x7e);
@@ -130,7 +130,7 @@ static void set_gpio40_gfx(void)
 	pm2_iowrite(0xf1, byte);
 
 	/* access the smbus extended register */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	/*if the dev3 is present, set the gfx to 2x8 lanes*/
 	/*otherwise set the gfx to 1x16 lanes*/
@@ -190,7 +190,7 @@ static void set_thermal_config(void)
 	pm2_iowrite(0x42, byte);
 
 	/* set GPIO 64 to input */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 	word = pci_read_config16(sm_dev, 0x56);
 	word |= 1 << 7;
 	pci_write_config16(sm_dev, 0x56, word);
diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c
index 6b0e229492..ff52b7b525 100644
--- a/src/mainboard/gigabyte/ma78gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma78gm/mainboard.c
@@ -32,7 +32,7 @@ void set_pcie_dereset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word |= (1 << 0) | (1 << 2);	/* Set Gpio6,4 as output */
@@ -45,7 +45,7 @@ void set_pcie_reset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word &= ~((1 << 0) | (1 << 2));	/* Set Gpio6,4 as output */
diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c
index ecd770bbb9..04d3ac1dcb 100644
--- a/src/mainboard/gizmosphere/gizmo/mainboard.c
+++ b/src/mainboard/gizmosphere/gizmo/mainboard.c
@@ -52,7 +52,7 @@ static void mainboard_final(void *chip_info)
 	uintptr_t ABAR;
 	u8 *memptr;
 
-	ahci_dev = dev_find_slot(0, PCI_DEVFN(0x11, 0));
+	ahci_dev = pcidev_on_root(0x11, 0);
 	ABAR = pci_read_config32(ahci_dev, 0x24);
 	ABAR &= 0xFFFFFC00;
 	memptr = (u8 *)(ABAR + 0x100 + 0x80 + 0x2C); /* we're on the 2nd port */
diff --git a/src/mainboard/gizmosphere/gizmo/mptable.c b/src/mainboard/gizmosphere/gizmo/mptable.c
index 6208aae99f..d44e27613e 100644
--- a/src/mainboard/gizmosphere/gizmo/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo/mptable.c
@@ -98,7 +98,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.	*/
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/gizmosphere/gizmo2/mptable.c b/src/mainboard/gizmosphere/gizmo2/mptable.c
index fc14165c2d..1808181cd8 100644
--- a/src/mainboard/gizmosphere/gizmo2/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo2/mptable.c
@@ -104,7 +104,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_F]);
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/google/kahlee/mptable.c b/src/mainboard/google/kahlee/mptable.c
index 0cda7f7676..428e5751f8 100644
--- a/src/mainboard/google/kahlee/mptable.c
+++ b/src/mainboard/google/kahlee/mptable.c
@@ -113,7 +113,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c
index 4919e6baed..6c896fcc55 100644
--- a/src/mainboard/google/link/mainboard.c
+++ b/src/mainboard/google/link/mainboard.c
@@ -151,7 +151,7 @@ static void mainboard_init(struct device *dev)
 		/* If running on proto1 - enable reversion of gpio11. */
 		u32 gpio_inv;
 		u16 gpio_base = pci_read_config16
-			(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE) &
+			(pcidev_on_root(0x1f, 0), GPIO_BASE) &
 			0xfffc;
 		u16 gpio_inv_addr = gpio_base + GPI_INV;
 		gpio_inv = inl(gpio_inv_addr);
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index b8c13a1a19..73d33a3a12 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -39,7 +39,7 @@ void pch_enable_lpc(void)
 	const struct device *lpc;
 	const struct southbridge_intel_bd82x6x_config *config = NULL;
 
-	lpc = dev_find_slot(0, PCI_DEVFN(0x1f, 0));
+	lpc = pcidev_on_root(0x1f, 0);
 	if (!lpc)
 		return;
 	if (lpc->chip_info)
diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c
index c94c9c8617..c87749e2d4 100644
--- a/src/mainboard/hp/abm/mptable.c
+++ b/src/mainboard/hp/abm/mptable.c
@@ -175,7 +175,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
index 66f8f463f1..08de04e4ca 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
@@ -142,7 +142,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index 6deafaa05f..25229542e0 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -110,7 +110,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x2, 0x0, 0x0, intr_data_ptr[PIRQ_E]);	/* Use INTE */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0 */
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c
index 066bd2edff..444cd33494 100644
--- a/src/mainboard/jetway/pa78vm5/mainboard.c
+++ b/src/mainboard/jetway/pa78vm5/mainboard.c
@@ -32,7 +32,7 @@ void set_pcie_dereset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word |= (1 << 0) | (1 << 2);	/* Set Gpio6,4 as output */
@@ -45,7 +45,7 @@ void set_pcie_reset(void)
 	u16 word;
 	struct device *sm_dev;
 	/* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	word = pci_read_config16(sm_dev, 0xA8);
 	word &= ~((1 << 0) | (1 << 2));	/* Set Gpio6,4 as output */
@@ -65,13 +65,13 @@ static void get_ide_dma66(void)
 	/*u32 sm_dev, ide_dev; */
 	struct device *sm_dev, ide_dev;
 
-	sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
+	sm_dev = pcidev_on_root(0x14, 0);
 
 	byte = pci_read_config8(sm_dev, 0xA9);
 	byte |= (1 << 5);	/* Set Gpio9 as input */
 	pci_write_config8(sm_dev, 0xA9, byte);
 
-	ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
+	ide_dev = pcidev_on_root(0x14, 1);
 	byte = pci_read_config8(ide_dev, 0x56);
 	byte &= ~(7 << 0);
 	if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))
diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c
index 37f0240662..3447646d24 100644
--- a/src/mainboard/kontron/ktqm77/mainboard.c
+++ b/src/mainboard/kontron/ktqm77/mainboard.c
@@ -172,7 +172,7 @@ static void mainboard_enable(struct device *dev)
 
 	unsigned disable = 0;
 	if ((get_option(&disable, "ethernet1") == CB_SUCCESS) && disable) {
-		struct device *nic = dev_find_slot(0, PCI_DEVFN(0x1c, 2));
+		struct device *nic = pcidev_on_root(0x1c, 2);
 		if (nic) {
 			printk(BIOS_DEBUG, "DISABLE FIRST NIC!\n");
 			nic->enabled = 0;
@@ -180,7 +180,7 @@ static void mainboard_enable(struct device *dev)
 	}
 	disable = 0;
 	if ((get_option(&disable, "ethernet2") == CB_SUCCESS) && disable) {
-		struct device *nic = dev_find_slot(0, PCI_DEVFN(0x1c, 3));
+		struct device *nic = pcidev_on_root(0x1c, 3);
 		if (nic) {
 			printk(BIOS_DEBUG, "DISABLE SECOND NIC!\n");
 			nic->enabled = 0;
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c
index 66f8f463f1..08de04e4ca 100644
--- a/src/mainboard/lenovo/g505s/mptable.c
+++ b/src/mainboard/lenovo/g505s/mptable.c
@@ -142,7 +142,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/lenovo/t400/fadt.c b/src/mainboard/lenovo/t400/fadt.c
index 5596115f42..ab257f8c3e 100644
--- a/src/mainboard/lenovo/t400/fadt.c
+++ b/src/mainboard/lenovo/t400/fadt.c
@@ -22,7 +22,7 @@
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
-	u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
+	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index bb52c87986..90bdc39662 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -51,7 +51,7 @@ static void mainboard_init(struct device *dev)
 	if (acpi_is_wakeup_s3())
 		ec_write(0x0c, 0xc7);
 
-	idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
+	idedev = pcidev_on_root(0x1f, 1);
 
 	if (!(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40)) {
 		/* legacy I/O connected */
diff --git a/src/mainboard/lenovo/x200/fadt.c b/src/mainboard/lenovo/x200/fadt.c
index 5596115f42..ab257f8c3e 100644
--- a/src/mainboard/lenovo/x200/fadt.c
+++ b/src/mainboard/lenovo/x200/fadt.c
@@ -22,7 +22,7 @@
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
-	u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
+	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index 419f8177a2..182d041f73 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -82,7 +82,7 @@ static void mainboard_enable(struct device *dev)
 	dev->ops->init = mainboard_init;
 	dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
 
-	pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
+	pmbase = pci_read_config32(pcidev_on_root(0x1f, 0),
 				   PMBASE) & 0xff80;
 
 	printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
@@ -90,9 +90,9 @@ static void mainboard_enable(struct device *dev)
 	outl(0, pmbase + SMI_EN);
 
 	enable_lapic();
-	pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE,
+	pci_write_config32(pcidev_on_root(0x1f, 0), GPIO_BASE,
 			   DEFAULT_GPIOBASE | 1);
-	pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL,
+	pci_write_config8(pcidev_on_root(0x1f, 0), GPIO_CNTL,
 			  0x10);
 
 	/* If we're resuming from suspend, blink suspend LED */
diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c
index 96d8062fbf..5cf0d26bbf 100644
--- a/src/mainboard/lenovo/x60/mainboard.c
+++ b/src/mainboard/lenovo/x60/mainboard.c
@@ -87,7 +87,7 @@ static void mainboard_init(struct device *dev)
 	if (acpi_is_wakeup_s3())
 		ec_write(0x0c, 0xc7);
 
-	idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
+	idedev = pcidev_on_root(0x1f, 1);
 	if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
 		struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
 		config->ide_enable_primary = 1;
diff --git a/src/mainboard/lenovo/z61t/mainboard.c b/src/mainboard/lenovo/z61t/mainboard.c
index 5a565e06c2..c7e7868a30 100644
--- a/src/mainboard/lenovo/z61t/mainboard.c
+++ b/src/mainboard/lenovo/z61t/mainboard.c
@@ -51,7 +51,7 @@ static void mainboard_init(struct device *dev)
 	if (acpi_is_wakeup_s3())
 		ec_write(0x0c, 0xc7);
 
-	idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
+	idedev = pcidev_on_root(0x1f, 1);
 
 	if (!(inb(DEFAULT_GPIOBASE + 0x0c) & 0x40)) {
 		/* legacy I/O connected */
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index cc25957dd1..9660a73ed5 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -97,7 +97,8 @@ static void init(struct device *dev)
 	}
 
 	/* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */
-	spi_base = (u8*)((uintptr_t)pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0);
+	spi_base = (u8 *)((uintptr_t)pci_read_config32(pcidev_on_root(0x14, 3),
+							   0xA0) & 0xFFFFFFE0);
 	spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register
 
 	/* Notify the SMC we're alive and kicking, or after a while it will
diff --git a/src/mainboard/lippert/frontrunner-af/mptable.c b/src/mainboard/lippert/frontrunner-af/mptable.c
index 26d22cd2e5..5e3a9508cb 100644
--- a/src/mainboard/lippert/frontrunner-af/mptable.c
+++ b/src/mainboard/lippert/frontrunner-af/mptable.c
@@ -97,7 +97,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.	*/
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c
index cea5350542..5cb0916244 100644
--- a/src/mainboard/lippert/toucan-af/mainboard.c
+++ b/src/mainboard/lippert/toucan-af/mainboard.c
@@ -63,7 +63,8 @@ static void init(struct device *dev)
 	       fch_gpio_state(58)<<2 | fch_gpio_state(57)<<1 | fch_gpio_state(56));
 
 	/* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */
-	spi_base = (u8*)((uintptr_t)pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0);
+	spi_base = (u8 *)((uintptr_t)pci_read_config32(pcidev_on_root(0x14, 3),
+							   0xA0) & 0xFFFFFFE0);
 	spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register
 
 	/* Notify the SMC we're alive and kicking, or after a while it will
diff --git a/src/mainboard/lippert/toucan-af/mptable.c b/src/mainboard/lippert/toucan-af/mptable.c
index 26d22cd2e5..5e3a9508cb 100644
--- a/src/mainboard/lippert/toucan-af/mptable.c
+++ b/src/mainboard/lippert/toucan-af/mptable.c
@@ -97,7 +97,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.	*/
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/msi/ms7721/mptable.c b/src/mainboard/msi/ms7721/mptable.c
index d97663d89e..0811fd2e1c 100644
--- a/src/mainboard/msi/ms7721/mptable.c
+++ b/src/mainboard/msi/ms7721/mptable.c
@@ -142,7 +142,7 @@ static void *smp_write_config_table(void *v)
 	/* on board NIC & Slot PCIE.  */
 
 	/* PCI slots */
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
+	struct device *dev = pcidev_on_root(0x14, 4);
 	if (dev && dev->enabled) {
 		u8 bus_pci = dev->link_list->secondary;
 		/* PCI_SLOT 0. */
diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c
index de9f13d0e3..1fe57d647d 100644
--- a/src/mainboard/packardbell/ms2290/mainboard.c
+++ b/src/mainboard/packardbell/ms2290/mainboard.c
@@ -99,7 +99,7 @@ static void mainboard_enable(struct device *dev)
 	for (i = 0; i < 256; i++)
 		ec_write (i, dmp[i]);
 
-	pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
+	pmbase = pci_read_config32(pcidev_on_root(0x1f, 0),
 				   PMBASE) & 0xff80;
 
 	printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
@@ -107,9 +107,9 @@ static void mainboard_enable(struct device *dev)
 	outl(0, pmbase + SMI_EN);
 
 	enable_lapic();
-	pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE,
+	pci_write_config32(pcidev_on_root(0x1f, 0), GPIO_BASE,
 			   DEFAULT_GPIOBASE | 1);
-	pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL,
+	pci_write_config8(pcidev_on_root(0x1f, 0), GPIO_CNTL,
 			  0x10);
 
 	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2);
diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c
index 1105d5f591..a9ce66b90f 100644
--- a/src/mainboard/pcengines/apu1/mainboard.c
+++ b/src/mainboard/pcengines/apu1/mainboard.c
@@ -255,7 +255,7 @@ const char *smbios_mainboard_serial_number(void)
  */
 static void usb_oc_setup(void)
 {
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(0x12, 0));
+	struct device *dev = pcidev_on_root(0x12, 0);
 
 	pci_write_config32(dev, 0x58, 0x011f0);
 }
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
index 6a01a8b015..b875437493 100644
--- a/src/mainboard/pcengines/apu2/mainboard.c
+++ b/src/mainboard/pcengines/apu2/mainboard.c
@@ -207,7 +207,7 @@ const char *smbios_mainboard_serial_number(void)
 	 * Read secondary bus number from the PCIe bridge where the first NIC is
 	 * connected.
 	 */
-	dev = dev_find_slot(0, PCI_DEVFN(2, 2));
+	dev = pcidev_on_root(2, 2);
 	if ((serial[0] != 0) || !dev)
 		return serial;
 
diff --git a/src/mainboard/roda/rk9/fadt.c b/src/mainboard/roda/rk9/fadt.c
index 5596115f42..ab257f8c3e 100644
--- a/src/mainboard/roda/rk9/fadt.c
+++ b/src/mainboard/roda/rk9/fadt.c
@@ -22,7 +22,7 @@
 void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 {
 	acpi_header_t *header = &(fadt->header);
-	u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
+	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 
 	memset((void *) fadt, 0, sizeof(acpi_fadt_t));
 	memcpy(header->signature, "FACP", 4);
diff --git a/src/mainboard/siemens/mc_bdx1/mainboard.c b/src/mainboard/siemens/mc_bdx1/mainboard.c
index 1e6acc7745..d13758636e 100644
--- a/src/mainboard/siemens/mc_bdx1/mainboard.c
+++ b/src/mainboard/siemens/mc_bdx1/mainboard.c
@@ -103,7 +103,7 @@ static void mainboard_enable(struct device *dev)
 static void mainboard_init(void *chip_info)
 {
 	uint8_t actl = 0;
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+	struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
 
 	/* Route SCI to IRQ 10 to free IRQ 9 slot. */
 	actl = pci_read_config8(dev, ACPI_CNTL_OFFSET);
@@ -120,7 +120,7 @@ static void mainboard_final(void *chip_info)
 {
 	void *spi_base = NULL;
 	uint32_t rcba = 0;
-	struct device *dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC));
+	struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC);
 
 	/* Get address of SPI controller. */
 	rcba = (pci_read_config32(dev, 0xf0) & 0xffffc000);
diff --git a/src/mainboard/supermicro/h8scm_fam10/mainboard.c b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
index 9ff43396ca..7ae3d70fad 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mainboard.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mainboard.c
@@ -36,7 +36,7 @@ void set_pcie_reset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
 }
@@ -45,7 +45,7 @@ void set_pcie_dereset(void)
 {
 	struct device *pcie_core_dev;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	pcie_core_dev = pcidev_on_root(0, 0);
 	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
 	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
 }