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| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-10-02 18:16:07 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-10-02 18:16:07 +0000 |
| commit | cb3f498296bad22b360796139bc454d141d7ccc9 (patch) | |
| tree | 34b62e7987a0d39a85da4afc325994fd65c83d89 /src/mainboard | |
| parent | 53311091a63f3fd63f24e296246e040730dfabbe (diff) | |
| download | coreboot-cb3f498296bad22b360796139bc454d141d7ccc9.tar.xz | |
success. It boots as a bproc slave now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/via/epia/auto.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index c11f57297f..5e00564756 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -64,6 +64,20 @@ enable_mainboard_devices(void) { } pci_write_config8(dev, 0x50, 7); pci_write_config8(dev, 0x51, 0xff); +#if 0 + // This early setup switches IDE into compatibility mode before PCI gets + // // a chance to assign I/Os + // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax + // // movb $0x09, %dl + // movb $0x00, %dl + // PCI_WRITE_CONFIG_BYTE + // +#endif + /* we do this here as in V2, we can not yet do raw operations + * to pci! + */ + dev++; /* ICKY */ + pci_write_config8(dev, 0x42, 0); } static void |