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authorWerner Zeh <werner.zeh@siemens.com>2019-09-25 08:54:44 +0200
committerWerner Zeh <werner.zeh@siemens.com>2019-09-30 05:11:06 +0000
commit3356305ca6cd72b6b92dd4e8ebbba2b828574b8e (patch)
treefec2113e1cee0e8fd78187ccc6a7fe2651211697 /src/mainboard
parentf553ae4bf39891b0758f5609d707289d26e75d5e (diff)
downloadcoreboot-3356305ca6cd72b6b92dd4e8ebbba2b828574b8e.tar.xz
mb/siemens/mc_bdx1: Enable VBOOT
Enable VBOOT in Kconfig and provide a flashmap that includes all the needed sections for VBOOT support. Change-Id: Iee12a5d1781c869b20bc14a52ecbf23474caa3fd Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35594 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/siemens/mc_bdx1/Kconfig15
-rw-r--r--src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd25
2 files changed, 39 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig b/src/mainboard/siemens/mc_bdx1/Kconfig
index 6feb1cf563..006758219a 100644
--- a/src/mainboard/siemens/mc_bdx1/Kconfig
+++ b/src/mainboard/siemens/mc_bdx1/Kconfig
@@ -16,6 +16,19 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
+config VBOOT
+ select VBOOT_MEASURED_BOOT
+ select VBOOT_VBNV_FLASH
+ select VBOOT_NO_BOARD_SUPPORT
+ select GBB_FLAG_DISABLE_LID_SHUTDOWN
+ select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+ select GBB_FLAG_DISABLE_FWMP
+
+config FMDFILE
+ string
+ default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/mc_bdx1.fmd" if VBOOT
+
config MAINBOARD_DIR
string
default "siemens/mc_bdx1"
@@ -30,7 +43,7 @@ config IRQ_SLOT_COUNT
config CBFS_SIZE
hex
- default 0x00D00000
+ default 0x00D00000 if !VBOOT
config VIRTUAL_ROM_SIZE
hex
diff --git a/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd b/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd
new file mode 100644
index 0000000000..cb7ef391e1
--- /dev/null
+++ b/src/mainboard/siemens/mc_bdx1/mc_bdx1.fmd
@@ -0,0 +1,25 @@
+FLASH@0xff000000 0x1000000 {
+ SI_ALL@0x0 0x300000 {
+ SI_DESC@0x0 0x1000
+ SI_ME@0x1000 0x2ff000
+ }
+ SI_BIOS@0x300000 0xd00000 {
+ RW_MRC_CACHE 0x10000
+ RW_SHARED 0x4000 {
+ SHARED_DATA 0x2000
+ VBLOCK_DEV 0x2000
+ }
+ RW_VPD 0x2000
+ RW_NVRAM 0x2000
+ WP_RO 0xce8000 {
+ RO_VPD 0x4000
+ RO_SECTION 0xce4000 {
+ FMAP 0x800
+ RO_FRID 0x40
+ RO_FRID_PAD 0x7c0
+ GBB 0xef000
+ COREBOOT(CBFS)
+ }
+ }
+ }
+}