diff options
| author | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 22:56:21 +0000 |
|---|---|---|
| committer | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 22:56:21 +0000 |
| commit | 5f9624d211a247c032a31b22c3b47158f7083c9e (patch) | |
| tree | ebb62857cc949d561338d5b38b249523d700c714 /src/mainboard | |
| parent | 93a5a194c5863262ed9b9fabc4cd40efcf1fddd9 (diff) | |
| download | coreboot-5f9624d211a247c032a31b22c3b47158f7083c9e.tar.xz | |
CONFIG_USE_PRINTK_IN_CAR and ht chain id for HTX support in
serengeti_cheeatah
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
40 files changed, 624 insertions, 1983 deletions
diff --git a/src/mainboard/Iwill/DK8HTX/auto.c b/src/mainboard/Iwill/DK8HTX/auto.c index f54c76a8ba..6234bfe704 100644 --- a/src/mainboard/Iwill/DK8HTX/auto.c +++ b/src/mainboard/Iwill/DK8HTX/auto.c @@ -192,7 +192,7 @@ print_err("D\n"); print_err("E\n"); enable_smbus(); -#if 1 +#if 0 dump_spd_registers(&cpu[0]); #endif print_err("F\n"); diff --git a/src/mainboard/amd/serengeti_cheetah/Config.lb b/src/mainboard/amd/serengeti_cheetah/Config.lb index f395e4138d..fdff457c0d 100644 --- a/src/mainboard/amd/serengeti_cheetah/Config.lb +++ b/src/mainboard/amd/serengeti_cheetah/Config.lb @@ -105,6 +105,20 @@ if HAVE_ACPI_TABLES action "mv pci2.hex ssdt2.c" end object ./ssdt2.o + makerule ssdt3.c + depends "$(MAINBOARD)/dx/pci3.asl" + action "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci3.asl" + action "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex" + action "mv pci3.hex ssdt3.c" + end + object ./ssdt3.o + makerule ssdt4.c + depends "$(MAINBOARD)/dx/pci4.asl" + action "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci4.asl" + action "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex" + action "mv pci4.hex ssdt4.c" + end + object ./ssdt4.o end end diff --git a/src/mainboard/amd/serengeti_cheetah/Options.lb b/src/mainboard/amd/serengeti_cheetah/Options.lb index 91712ece99..b4d69ca9da 100644 --- a/src/mainboard/amd/serengeti_cheetah/Options.lb +++ b/src/mainboard/amd/serengeti_cheetah/Options.lb @@ -89,6 +89,8 @@ uses MEM_TRAIN_SEQ uses WAIT_BEFORE_CPUS_INIT +uses CONFIG_USE_PRINTK_IN_CAR + ### ### Build options ### @@ -212,9 +214,12 @@ default DCACHE_RAM_SIZE=0x08000 default DCACHE_RAM_GLOBAL_VAR_SIZE=0x01000 default CONFIG_USE_INIT=0 + +## +## for rev F training on AP purpose +## default CONFIG_AP_CODE_IN_CAR=1 default MEM_TRAIN_SEQ=1 - default WAIT_BEFORE_CPUS_INIT=1 ## @@ -271,8 +276,8 @@ default CONFIG_ROM_STREAM = 1 ## ## The default compiler ## -default CC="$(CROSS_COMPILE)gcc-3.4.5 -m32" -default HOSTCC="gcc-3.4.5" +default CC="$(CROSS_COMPILE)gcc -m32" +default HOSTCC="gcc" ## ## Disable the gdb stub by default @@ -282,6 +287,7 @@ default CONFIG_GDB_STUB=0 ## ## The Serial Console ## +default CONFIG_USE_PRINTK_IN_CAR=0 # To Enable the Serial Console default CONFIG_CONSOLE_SERIAL8250=1 diff --git a/src/mainboard/amd/serengeti_cheetah/a b/src/mainboard/amd/serengeti_cheetah/a deleted file mode 100644 index d6a8f398e0..0000000000 --- a/src/mainboard/amd/serengeti_cheetah/a +++ /dev/null @@ -1,25 +0,0 @@ -echo "Creating for ACPI hex for bus 1 Conf" -cd dx -iasl -tc dsdt_lb.dsl -rm DSDT.aml -mv dsdt_lb.hex ../dsdt.c -iasl -tc pci2.asl -rm SSDT2.aml -perl -e 's/AmlCode/AmlCode_ssdt2/g' -pi pci2.hex -mv pci2.hex ../ssdt2.c -cd .. -echo "Creating for ACPI hex for bus 0 Conf" -cd dx_bus0 -iasl -tc dsdt_lb.dsl -rm DSDT.aml -mv dsdt_lb.hex ../dsdt_bus0.c -iasl -tc pci2.asl -rm SSDT2.aml -perl -e 's/AmlCode/AmlCode_ssdt2/g' -pi pci2.hex -mv pci2.hex ../ssdt2_bus0.c -cd .. -echo "Creating ssdt" -iasl -tc ssdt_lb_x.dsl -rm SSDT.aml -perl -e 's/AmlCode/AmlCode_ssdt/g' -pi ssdt_lb_x.hex -mv ssdt_lb_x.hex ssdt.c diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c index e4cf72b268..1ba92e2b64 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c @@ -42,12 +42,8 @@ extern unsigned char AmlCode_ssdt[]; #if ACPI_SSDTX_NUM >= 1 extern unsigned char AmlCode_ssdt2[]; -//extern unsigned char AmlCode_ssdt3[]; -//extern unsigned char AmlCode_ssdt4[]; -//extern unsigned char AmlCode_ssdt5[]; -//extern unsigned char AmlCode_ssdt6[]; -//extern unsigned char AmlCode_ssdt7[]; -//extern unsigned char AmlCode_ssdt8[]; +extern unsigned char AmlCode_ssdt3[]; +extern unsigned char AmlCode_ssdt4[]; #endif #define IO_APIC_ADDR 0xfec00000UL @@ -90,6 +86,51 @@ unsigned long acpi_fill_madt(unsigned long current) gsi_base+=7; } } + + int i; + int j = 0; + + for(i=1; i< sysconf.hc_possible_num; i++) { + unsigned d; + if(!(sysconf.pci1234[i] & 0x1) ) continue; + // 8131 need to use +4 + + switch (sysconf.hcid[i]) { + case 1: + d = 7; + break; + case 3: + d = 4; + break; + } + switch (sysconf.hcid[i]) { + case 1: + case 3: + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0], + res->base, gsi_base ); + gsi_base+=d; + } + } + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1], + res->base, gsi_base ); + gsi_base+=d; + + } + } + break; + } + + j++; + } + } current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *) @@ -112,6 +153,29 @@ extern void get_bus_conf(void); extern void update_ssdt(void *ssdt); +void update_ssdtx(void *ssdtx, int i) +{ + uint8_t *PCI; + uint8_t *HCIN; + uint8_t *UID; + + PCI = ssdtx + 0x32; + HCIN = ssdtx + 0x39; + UID = ssdtx + 0x40; + + if(i<7) { + *PCI = (uint8_t) ('4' + i - 1); + } + else { + *PCI = (uint8_t) ('A' + i - 1 - 6); + } + *HCIN = (uint8_t) i; + *UID = (uint8_t) (i+3); + + /* FIXME: need to update the GSI id in the ssdtx too */ + +} + unsigned long write_acpi_tables(unsigned long start) { unsigned long current; @@ -126,6 +190,7 @@ unsigned long write_acpi_tables(unsigned long start) acpi_header_t *dsdt; acpi_header_t *ssdt; acpi_header_t *ssdtx; + unsigned char *p; unsigned char *AmlCode_ssdtx[HC_POSSIBLE_NUM]; @@ -195,27 +260,42 @@ unsigned long write_acpi_tables(unsigned long start) acpi_add_table(rsdt,ssdt); #if ACPI_SSDTX_NUM >= 1 - // we need to make ssdt2 match to PCI2 in pci2.asl,... pci1234[1] - AmlCode_ssdtx[1] = AmlCode_ssdt2; -// AmlCode_ssdtx[2] = AmlCode_ssdt3; -// AmlCode_ssdtx[3] = AmlCode_ssdt4; -// AmlCode_ssdtx[4] = AmlCode_ssdt5; -// AmlCode_ssdtx[5] = AmlCode_ssdt6; -// AmlCode_ssdtx[6] = AmlCode_ssdt7; -// AmlCode_ssdtx[7] = AmlCode_ssdt8; - - //same htio, but different possition? We may have to copy, change HCIN, and recalculate the checknum and add_table - - for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink - if((sysconf.pci1234[i] & 1) != 1 ) continue; - printk_debug("ACPI: * SSDT for PCI%d\n", i+1); //pci0 and pci1 are in dsdt - ssdtx = (acpi_header_t *)current; - current += ((acpi_header_t *)AmlCode_ssdtx[i])->length; - memcpy((void *)ssdtx, (void *)AmlCode_ssdtx[i], ((acpi_header_t *)AmlCode_ssdtx[i])->length); - acpi_add_table(rsdt,ssdtx); - } -#endif + //same htio, but different position? We may have to copy, change HCIN, and recalculate the checknum and add_table + + for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink + if((sysconf.pci1234[i] & 1) != 1 ) continue; + uint8_t c; + if(i<7) { + c = (uint8_t) ('4' + i - 1); + } + else { + c = (uint8_t) ('A' + i - 1 - 6); + } + printk_debug("ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); //pci0 and pci1 are in dsdt + current = ( current + 0x07) & -0x08; + ssdtx = (acpi_header_t *)current; + switch(sysconf.hcid[i]) { + case 1: //8132 + p = AmlCode_ssdt2; + break; + case 2: //8151 + p = AmlCode_ssdt3; + break; + case 3: //8131 + p = AmlCode_ssdt4; + break; + default: + continue; + } + current += ((acpi_header_t *)p)->length; + memcpy((void *)ssdtx, (void *)p, ((acpi_header_t *)p)->length); + update_ssdtx((void *)ssdtx, i); + ssdtx->checksum = 0; + ssdtx->checksum = acpi_checksum((unsigned char *)ssdtx,ssdtx->length); + acpi_add_table(rsdt,ssdtx); + } +#endif /* FACS */ printk_debug("ACPI: * FACS\n"); diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c index d6a19e6e96..8f707884f2 100644 --- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c +++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c @@ -21,6 +21,16 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" + #if CONFIG_USE_PRINTK_IN_CAR == 1 + #include "lib/uart8250.c" + #include "console/vtxprintf.c" + #include "arch/i386/lib/printk_init.c" + #endif +#endif + #include "arch/i386/lib/console.c" #if 0 @@ -40,10 +50,6 @@ static void post_code(uint8_t value) { #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - //#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" @@ -72,7 +78,11 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); +#if CONFIG_USE_PRINTK_IN_CAR + printk_debug("CODE IN CACHE ON NODE: %02x\n"); +#else print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); +#endif train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/amd/serengeti_cheetah/c b/src/mainboard/amd/serengeti_cheetah/c deleted file mode 100644 index 0abeb0ea86..0000000000 --- a/src/mainboard/amd/serengeti_cheetah/c +++ /dev/null @@ -1,5 +0,0 @@ -rm dsdt.c -rm ssdt2.c -rm dsdt_bus0.c -rm ssdt2_bus0.c -rm ssdt.c diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c index c338704553..4eb7a71070 100644 --- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c @@ -15,16 +15,13 @@ //used by init_cpus and fidvid -#define K8_SET_FIDVID 1 +#define K8_SET_FIDVID 0 //if we want to wait for core1 done before DQS training, set it to 0 #define K8_SET_FIDVID_CORE0_ONLY 1 -//0: three for in bsp, only this one support F0_F1 workaround -//1: on every core0 -//2: one for on bsp -//#define MEM_TRAIN_SEQ 1 - +#if K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 +#endif #include <stdint.h> #include <device/pci_def.h> @@ -59,14 +56,19 @@ static void post_code(uint8_t value) { #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" -#include "cpu/x86/bist.h" #if USE_FAILOVER_IMAGE==0 +#include "cpu/x86/bist.h" #include "lib/delay.c" #if CONFIG_USE_INIT == 0 #include "lib/memcpy.c" + #if CONFIG_USE_PRINTK_IN_CAR == 1 + #include "lib/uart8250.c" + #include "console/vtxprintf.c" + #include "arch/i386/lib/printk_init.c" + #endif #endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" @@ -123,12 +125,12 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } -#include "northbridge/amd/amdk8/amdk8_f.h" +#include "northbridge/amd/amdk8/amdk8.h" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" +#include "northbridge/amd/amdk8/raminit.c" #include "sdram/generic_sdram.c" @@ -263,8 +265,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0; if (bist == 0) { - //It's the time to set ctrl in sysinfo now; - fill_mem_ctrl(CONFIG_MAX_PHYSICAL_CPUS, sysinfo->ctrl, spd_addr); bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); } @@ -281,7 +281,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n"); - setup_serengeti_cheetah_resource_map(); + setup_mb_resource_map(); #if 0 dump_pci_device(PCI_DEV(0, 0x18, 0)); dump_pci_device(PCI_DEV(0, 0x19, 0)); @@ -350,10 +350,8 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif allow_all_aps_stop(bsp_apicid); -#if 0 //It's the time to set ctrl in sysinfo now; fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); -#endif enable_smbus(); diff --git a/src/mainboard/amd/serengeti_cheetah/dx/pci2.asl b/src/mainboard/amd/serengeti_cheetah/dx/pci2.asl index a62ba98333..217491ad0a 100644 --- a/src/mainboard/amd/serengeti_cheetah/dx/pci2.asl +++ b/src/mainboard/amd/serengeti_cheetah/dx/pci2.asl @@ -23,21 +23,21 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) External (\_SB.PCI0.LNKC, DeviceObj) External (\_SB.PCI0.LNKD, DeviceObj) - Device (PCI2) + Device (PCIX) { // BUS ? Second HT Chain - Name (HCIN, 0x01) // HC2 + Name (HCIN, 0xcc) // HC2 0x01 + + Name (_UID, 0xdd) // HC 0x03 Name (_HID, "PNP0A03") Method (_ADR, 0, NotSerialized) //Fake bus should be 0 { - Return (DADD(GHCN(HCIN), 0x00180000)) + Return (DADD(GHCN(HCIN), 0x00000000)) } - Name (_UID, 0x03) - Method (_BBN, 0, NotSerialized) { Return (GBUS (GHCN(HCIN), GHCL(HCIN))) diff --git a/src/mainboard/amd/serengeti_cheetah/dx/pci2_hc.asl b/src/mainboard/amd/serengeti_cheetah/dx/pci2_hc.asl index 045d090392..03443adce5 100644 --- a/src/mainboard/amd/serengeti_cheetah/dx/pci2_hc.asl +++ b/src/mainboard/amd/serengeti_cheetah/dx/pci2_hc.asl @@ -1 +1 @@ - Include ("amd8151.asl") + Include ("amd8132_2.asl") diff --git a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c index cc4c0e4219..d76b1ef2b9 100644 --- a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c +++ b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c @@ -42,13 +42,44 @@ extern void get_sblk_pci1234(void); static unsigned get_bus_conf_done = 0; +static unsigned get_hcid(unsigned i) +{ + unsigned id = 0; + + unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff; + + unsigned devn = sysconf.hcdn[i] & 0xff; + + device_t dev; + + dev = dev_find_slot(busn, PCI_DEVFN(devn,0)); + + switch (dev->device) { + case 0x7458: //8132 + id = 1; + break; + case 0x7454: //8151 + id = 2; + break; + case 0x7450: //8131 + id = 3; + break; + } + + // we may need more way to find out hcid: subsystem id? GPIO read ? + + // we need use id for 1. bus num, 2. mptable, 3. acpi table + + return id; +} + void get_bus_conf(void) { unsigned apicid_base; device_t dev; - int i; + int i, j; struct mb_sysconf_t *m; if(get_bus_conf_done == 1) return; //do it only once @@ -69,7 +100,6 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff; m->sbdn3 = sysconf.hcdn[0] & 0xff; - m->sbdn5 = sysconf.hcdn[1] & 0xff; m->bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff; m->bus_8111_0 = m->bus_8132_0; @@ -112,22 +142,69 @@ void get_bus_conf(void) } /* HT chain 1 */ - if((sysconf.pci1234[1] & 0x1) == 1) { - m->bus_8151_0 = (sysconf.pci1234[1] >> 16) & 0xff; - /* 8151 */ - dev = dev_find_slot(m->bus_8151_0, PCI_DEVFN(m->sbdn5+1, 0)); - - if (dev) { - m->bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); -// printk_debug("bus_8151_1=%d\n",bus_8151_1); - m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - m->bus_isa++; - } - else { - printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151_0, m->sbdn5+1); - } + j=0; + for(i=1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue; + + // check hcid type here + sysconf.hcid[i] = get_hcid(i); + + switch(sysconf.hcid[i]) { + + case 1: //8132 + case 3: //8131 + + m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff; + + m->sbdn3a[j] = sysconf.hcdn[i] & 0xff; + + /* 8132-1 */ + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j],0)); + if (dev) { + m->bus_8132a[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS); + } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]); + } + + /* 8132-2 */ + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0)); + if (dev) { + m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS); + m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + m->bus_isa++; + // printk_debug("bus_isa=%d\n",bus_isa); + } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1); + } + + break; + + case 2: //8151 + + m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff; + m->sbdn5[j] = sysconf.hcdn[i] & 0xff; + /* 8151 */ + dev = dev_find_slot(m->bus_8151[j][0], PCI_DEVFN(m->sbdn5[j]+1, 0)); + + if (dev) { + m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS); + // printk_debug("bus_8151_1=%d\n",bus_8151[j][1]); + m->bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + m->bus_isa++; + } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1); + } + + break; + } + + j++; } + /*I/O APICs: APIC ID Version State Address*/ #if CONFIG_LOGICAL_CPUS==1 apicid_base = get_apicid_base(3); @@ -137,4 +214,9 @@ void get_bus_conf(void) m->apicid_8111 = apicid_base+0; m->apicid_8132_1 = apicid_base+1; m->apicid_8132_2 = apicid_base+2; + for(i=0;i<j;i++) { + m->apicid_8132a[i][0] = apicid_base + 3 + i*2; + m->apicid_8132a[i][1] = apicid_base + 3 + i*2 + 1; + } + } diff --git a/src/mainboard/amd/serengeti_cheetah/irq_tables.c b/src/mainboard/amd/serengeti_cheetah/irq_tables.c index fb793078df..d6837c061b 100644 --- a/src/mainboard/amd/serengeti_cheetah/irq_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/irq_tables.c @@ -113,14 +113,20 @@ unsigned long write_pirq_routing_table(unsigned long addr) //pcix bridge // write_pirq_info(pirq_info, m->bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); // pirq_info++; slot_num++; - - if(sysconf.pci1234[1] & 0xf) { - //agp bridge - write_pirq_info(pirq_info, m->bus_8151_0, (m->sbdn5<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); - } - pirq_info++; slot_num++; - + int j = 0; + + for(i=1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue; + unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff; + unsigned devn = sysconf.hcdn[i] & 0xff; + + write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + pirq_info++; slot_num++; + j++; + + } + pirq->size = 32 + 16 * slot_num; for (i = 0; i < pirq->size; i++) diff --git a/src/mainboard/amd/serengeti_cheetah/mb_sysconf.h b/src/mainboard/amd/serengeti_cheetah/mb_sysconf.h index 7368f05b4e..189c518414 100644 --- a/src/mainboard/amd/serengeti_cheetah/mb_sysconf.h +++ b/src/mainboard/amd/serengeti_cheetah/mb_sysconf.h @@ -9,14 +9,20 @@ struct mb_sysconf_t { unsigned char bus_8132_2; unsigned char bus_8111_0; unsigned char bus_8111_1; - unsigned char bus_8151_0; - unsigned char bus_8151_1; - unsigned apicid_8111; - unsigned apicid_8132_1; - unsigned apicid_8132_2; - - unsigned sbdn3; - unsigned sbdn5; + + unsigned char bus_8132a[7][3]; + + unsigned char bus_8151[7][2]; + + unsigned apicid_8111; + unsigned apicid_8132_1; + unsigned apicid_8132_2; + unsigned apicid_8132a[7][2]; + + unsigned sbdn3; + unsigned sbdn3a[7]; + unsigned sbdn5[7]; + }; #endif diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index d27c786631..9b8cbec2cd 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -20,7 +20,7 @@ void *smp_write_config_table(void *v) struct mp_config_table *mc; unsigned char bus_num; - int i; + int i, j; struct mb_sysconf_t *m; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -72,6 +72,34 @@ void *smp_write_config_table(void *v) smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base); } } + + j = 0; + + for(i=1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue; + + switch(sysconf.hcid[i]) { + case 1: // 8132 + case 3: // 8131 + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base); + } + } + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base); + } + } + break; + } + j++; + } + } /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ @@ -95,11 +123,6 @@ void *smp_write_config_table(void *v) // Onboard AMD USB smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0<<2)|3, m->apicid_8111, 0x13); - if(sysconf.pci1234[1] & 0xf) { - // Slot AGP - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151_1, 0x0, m->apicid_8111, 0x11); - } - //Slot 3 PCI 32 for(i=0;i<4;i++) { smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5<<2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16 @@ -123,6 +146,50 @@ void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1<<2)|i, m->apicid_8132_1, (1+i)%4); //25 } + j = 0; + + for(i=1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue; + int ii; + device_t dev; + struct resource *res; + switch(sysconf.hcid[i]) { + case 1: + case 3: + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + //Slot 1 PCI-X 133/100/66 + for(ii=0;ii<4;ii++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0<<2)|ii, m->apicid_8132a[j][0], (0+ii)%4); // + } + } + } + + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + //Slot 2 PCI-X 133/100/66 + for(ii=0;ii<4;ii++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0<<2)|ii, m->apicid_8132a[j][1], (0+ii)%4); //25 + } + } + } + + break; + case 2: + + // Slot AGP + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11); + break; + } + + j++; + } + + /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0); diff --git a/src/mainboard/amd/serengeti_cheetah/resourcemap.c b/src/mainboard/amd/serengeti_cheetah/resourcemap.c index e42bbcc1af..e5fc91b30e 100644 --- a/src/mainboard/amd/serengeti_cheetah/resourcemap.c +++ b/src/mainboard/amd/serengeti_cheetah/resourcemap.c @@ -1,9 +1,8 @@ /* - * AMD serengeti_cheetah needs a different resource map * */ -static void setup_serengeti_cheetah_resource_map(void) +static void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ diff --git a/src/mainboard/amd/serengeti_leopard/Config.lb b/src/mainboard/amd/serengeti_leopard/Config.lb index 3132377563..2f9a58ceee 100644 --- a/src/mainboard/amd/serengeti_leopard/Config.lb +++ b/src/mainboard/amd/serengeti_leopard/Config.lb @@ -2,12 +2,17 @@ ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## -if USE_FALLBACK_IMAGE - default ROM_SECTION_SIZE = FALLBACK_SIZE - default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) +if USE_FAILOVER_IMAGE + default ROM_SECTION_SIZE = FAILOVER_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FAILOVER_SIZE ) else - default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) + else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE - FAILOVER_SIZE ) default ROM_SECTION_OFFSET = 0 + end end ## @@ -30,7 +35,16 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE ) ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## default XIP_ROM_SIZE=65536 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) + +if USE_FAILOVER_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) +else + if USE_FALLBACK_IMAGE + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE + FAILOVER_SIZE) + else + default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE) + end +end arch i386 end @@ -74,45 +88,22 @@ end if HAVE_ACPI_TABLES object acpi_tables.o object fadt.o - if SB_HT_CHAIN_ON_BUS0 - makerule dsdt.c - depends "$(MAINBOARD)/dx_bus0/dsdt_lb.dsl" - action "/usr/sbin/iasl -tc $(MAINBOARD)/dx_bus0/dsdt_lb.dsl" - action "mv dsdt_lb.hex dsdt.c" - end - else - makerule dsdt.c - depends "$(MAINBOARD)/dx/dsdt_lb.dsl" - action "/usr/sbin/iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl" - action "mv dsdt_lb.hex dsdt.c" - end + makerule dsdt.c + depends "$(MAINBOARD)/dx/dsdt_lb.dsl" + action "/usr/sbin/iasl -tc $(MAINBOARD)/dx/dsdt_lb.dsl" + action "mv dsdt_lb.hex dsdt.c" end object ./dsdt.o - makerule ssdt.c - depends "$(MAINBOARD)/ssdt_lb_x.dsl" - action "/usr/sbin/iasl -tc $(MAINBOARD)/ssdt_lb_x.dsl" - action "perl -pi -e 's/AmlCode/AmlCode_ssdt/g' ssdt_lb_x.hex" - action "mv ssdt_lb_x.hex ssdt.c" - end - object ./ssdt.o + #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb if ACPI_SSDTX_NUM - if SB_HT_CHAIN_ON_BUS0 - makerule ssdt2.c + makerule ssdt2.c depends "$(MAINBOARD)/dx/pci2.asl" action "/usr/sbin/iasl -tc $(MAINBOARD)/dx/pci2.asl" action "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex" action "mv pci2.hex ssdt2.c" - end - else - makerule ssdt2.c - depends "$(MAINBOARD)/dx_bus0/pci2.asl" - action "/usr/sbin/iasl -tc $(MAINBOARD)/dx_bus0/pci2.asl" - action "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex" - action "mv pci2.hex ssdt2.c" - end - end + end object ./ssdt2.o end end @@ -123,7 +114,7 @@ if USE_DCACHE_RAM # compile cache_as_ram.c to auto.o makerule ./cache_as_ram_auto.o depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h" - action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o cache_as_ram_auto.o" + action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" end else @@ -164,10 +155,16 @@ end ## ## Build our 16 bit and 32 bit linuxBIOS entry code ## - -if USE_FALLBACK_IMAGE +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + mainboardinit cpu/x86/16bit/entry16.inc + ldscript /cpu/x86/16bit/entry16.lds + end +else + if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/entry16.inc ldscript /cpu/x86/16bit/entry16.lds + end end mainboardinit cpu/x86/32bit/entry32.inc @@ -184,12 +181,22 @@ end ## ## Build our reset vector (This is where linuxBIOS is entered) ## -if USE_FALLBACK_IMAGE +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds + else + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds + end else + if USE_FALLBACK_IMAGE + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds + else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds + end end if USE_DCACHE_RAM @@ -216,13 +223,21 @@ end ### Things are delicate and we test to see if we should ### failover to another image. ### -if USE_FALLBACK_IMAGE +if HAVE_FAILOVER_BOOT + if USE_FAILOVER_IMAGE + if USE_DCACHE_RAM + ldscript /arch/i386/lib/failover_failover.lds + end + end +else + if USE_FALLBACK_IMAGE if USE_DCACHE_RAM ldscript /arch/i386/lib/failover.lds else ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end + end end ### diff --git a/src/mainboard/amd/serengeti_leopard/Options.lb b/src/mainboard/amd/serengeti_leopard/Options.lb index 46ea2c2a55..b7ea7606ea 100644 --- a/src/mainboard/amd/serengeti_leopard/Options.lb +++ b/src/mainboard/amd/serengeti_leopard/Options.lb @@ -4,6 +4,8 @@ uses HAVE_ACPI_TABLES uses ACPI_SSDTX_NUM uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT +uses USE_FAILOVER_IMAGE +uses HAVE_FAILOVER_BOOT uses HAVE_HARD_RESET uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE @@ -13,6 +15,7 @@ uses CONFIG_LOGICAL_CPUS uses CONFIG_IOAPIC uses CONFIG_SMP uses FALLBACK_SIZE +uses FAILOVER_SIZE uses ROM_SIZE uses ROM_SECTION_SIZE uses ROM_IMAGE_SIZE @@ -76,6 +79,9 @@ uses LIFT_BSP_APIC_ID uses CONFIG_PCI_64BIT_PREF_MEM +uses CONFIG_LB_MEM_TOPK + +uses CONFIG_USE_PRINTK_IN_CAR ### ### Build options @@ -90,13 +96,20 @@ default ROM_SIZE=524288 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use ## #default FALLBACK_SIZE=131072 -#256K -default FALLBACK_SIZE=0x40000 +#default FALLBACK_SIZE=0x40000 + +#FALLBACK: 256K-4K +default FALLBACK_SIZE=0x3f000 +#FAILOVER: 4K +default FAILOVER_SIZE=0x01000 + +default CONFIG_LB_MEM_TOPK=2048 ## ## Build code for the fallback boot ## default HAVE_FALLBACK_BOOT=1 +default HAVE_FAILOVER_BOOT=1 ## ## Build code to reset the motherboard from linuxBIOS @@ -141,7 +154,7 @@ default CONFIG_MAX_CPUS=4 default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_LOGICAL_CPUS=1 -#default SERIAL_CPU_INIT=0 +default SERIAL_CPU_INIT=0 default ENABLE_APIC_EXT_ID=0 default APIC_ID_OFFSET=0x8 @@ -152,9 +165,9 @@ default CONFIG_CHIP_NAME=1 #memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead. #2G -default HW_MEM_HOLE_SIZEK=0x200000 +#default HW_MEM_HOLE_SIZEK=0x200000 #1G -#default HW_MEM_HOLE_SIZEK=0x100000 +default HW_MEM_HOLE_SIZEK=0x100000 #512M #default HW_MEM_HOLE_SIZEK=0x80000 @@ -169,13 +182,13 @@ default CONFIG_CONSOLE_VGA=1 default CONFIG_PCI_ROM_RUN=1 #HT Unit ID offset -default HT_CHAIN_UNITID_BASE=0x4 +default HT_CHAIN_UNITID_BASE=0xa #real SB Unit ID -default HT_CHAIN_END_UNITID_BASE=0x1 +default HT_CHAIN_END_UNITID_BASE=0x6 #make the SB HT chain on bus 0 -default SB_HT_CHAIN_ON_BUS0=1 +default SB_HT_CHAIN_ON_BUS0=2 #allow capable device use that above 4G #default CONFIG_PCI_64BIT_PREF_MEM=1 @@ -221,7 +234,7 @@ default HEAP_SIZE=0x4000 ## ## Only use the option table in a normal image ## -default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE +default USE_OPTION_TABLE = (!USE_FALLBACK_IMAGE) && (!USE_FAILOVER_IMAGE ) ## ## LinuxBIOS C code runs at this location in RAM @@ -240,8 +253,8 @@ default CONFIG_ROM_STREAM = 1 ## ## The default compiler ## -default CC="$(CROSS_COMPILE)gcc -m32" -default HOSTCC="gcc" +default CC="$(CROSS_COMPILE)gcc-4.0.2 -m32" +default HOSTCC="gcc-4.0.2" ## ## Disable the gdb stub by default @@ -251,6 +264,7 @@ default CONFIG_GDB_STUB=0 ## ## The Serial Console ## +default CONFIG_USE_PRINTK_IN_CAR=1 # To Enable the Serial Console default CONFIG_CONSOLE_SERIAL8250=1 diff --git a/src/mainboard/amd/serengeti_leopard/acpi_tables.c b/src/mainboard/amd/serengeti_leopard/acpi_tables.c index 6bfeb46be0..eb15ec51bb 100644 --- a/src/mainboard/amd/serengeti_leopard/acpi_tables.c +++ b/src/mainboard/amd/serengeti_leopard/acpi_tables.c @@ -15,8 +15,9 @@ #include <device/pci_ids.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> +#include <cpu/amd/amdk8_sysconf.h> -#define DUMP_ACPI_TABLES 1 +#define DUMP_ACPI_TABLES 0 #if DUMP_ACPI_TABLES == 1 static void dump_mem(unsigned start, unsigned end) @@ -34,7 +35,6 @@ static void dump_mem(unsigned start, unsigned end) } #endif -#define HC_POSSIBLE_NUM 8 extern unsigned char AmlCode[]; extern unsigned char AmlCode_ssdt[]; @@ -62,12 +62,6 @@ extern unsigned apicid_8111; extern unsigned apicid_8132_1; extern unsigned apicid_8132_2; -extern unsigned pci1234[]; -extern unsigned hc_possible_num; -extern unsigned sblk; -extern unsigned sbdn; -extern unsigned hcdn[]; - unsigned long acpi_fill_madt(unsigned long current) { unsigned int gsi_base=0x18; @@ -83,7 +77,7 @@ unsigned long acpi_fill_madt(unsigned long current) { device_t dev; struct resource *res; - dev = dev_find_slot(bus_8132_0, PCI_DEVFN((hcdn[0]&0xff), 1)); + dev = dev_find_slot(bus_8132_0, PCI_DEVFN((sysconf.hcdn[0]&0xff), 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { @@ -93,7 +87,7 @@ unsigned long acpi_fill_madt(unsigned long current) } } - dev = dev_find_slot(bus_8132_0, PCI_DEVFN((hcdn[0] & 0xff)+1, 1)); + dev = dev_find_slot(bus_8132_0, PCI_DEVFN((sysconf.hcdn[0] & 0xff)+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { @@ -120,78 +114,9 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -//FIXME: next could be moved to northbridge/amd/amdk8/amdk8_acpi.c or cpu/amd/k8/k8_acpi.c begin -static void int_to_stream(uint32_t val, uint8_t *dest) -{ - int i; - for(i=0;i<4;i++) { - *(dest+i) = (val >> (8*i)) & 0xff; - } -} - extern void get_bus_conf(void); -static void update_ssdt(void *ssdt) -{ - uint8_t *BUSN; - uint8_t *MMIO; - uint8_t *PCIO; - uint8_t *SBLK; - uint8_t *TOM1; - uint8_t *SBDN; - uint8_t *HCLK; - uint8_t *HCDN; - - int i; - device_t dev; - uint32_t dword; - msr_t msr; - - BUSN = ssdt+0x3a; //+5 will be next BUSN - MMIO = ssdt+0x57; //+5 will be next MMIO - PCIO = ssdt+0xaf; //+5 will be next PCIO - SBLK = ssdt+0xdc; // one byte - TOM1 = ssdt+0xe3; // - SBDN = ssdt+0xed;// - HCLK = ssdt+0xfa; //+5 will be next HCLK - HCDN = ssdt+0x12a; //+5 will be next HCDN - - - dev = dev_find_slot(0, PCI_DEVFN(0x18, 1)); - - for(i=0;i<4;i++) { - dword = pci_read_config32(dev, 0xe0+i*4); - int_to_stream(dword, BUSN+i*5); - } - - for(i=0;i<0x10;i++) { - dword = pci_read_config32(dev, 0x80+i*4); - int_to_stream(dword, MMIO+i*5); - } - - for(i=0;i<0x08;i++) { - dword = pci_read_config32(dev, 0xc0+i*4); - int_to_stream(dword, PCIO+i*5); - } - - *SBLK = (uint8_t)(sblk); - - msr = rdmsr(TOP_MEM); - int_to_stream(msr.lo, TOM1); - - for(i=0;i<hc_possible_num;i++) { - int_to_stream(pci1234[i], HCLK + i*5); - int_to_stream(hcdn[i], HCDN + i*5); - } - for(i=hc_possible_num; i<HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8 - int_to_stream(0x00000000, HCLK + i*5); - int_to_stream(0x20202020, HCDN + i*5); - } - - int_to_stream(sbdn, SBDN); - -} -//end +extern void update_ssdt(void *ssdt); unsigned long write_acpi_tables(unsigned long start) { @@ -279,8 +204,8 @@ unsigned long write_acpi_tables(unsigned long start) //same htio, but different possition? We may have to copy, change HCIN, and recalculate the checknum and add_table - for(i=1;i<hc_possible_num;i++) { // 0: is hc sblink - if((pci1234[i] & 1) != 1 ) continue; + for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink + if((sysconf.pci1234[i] & 1) != 1 ) continue; printk_debug("ACPI: * SSDT for PCI%d\n", i+1); //pci0 and pci1 are in dsdt ssdtx = (acpi_header_t *)current; current += ((acpi_header_t *)AmlCode_ssdtx[i])->length; diff --git a/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c index c31e9e6dab..9a0c3aec21 100644 --- a/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c @@ -8,7 +8,7 @@ #endif //use by raminit -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 //used by incoherent_ht //#define K8_SCAN_PCI_BUS 1 @@ -23,6 +23,8 @@ #include <cpu/x86/lapic.h> #include "option_table.h" #include "pc80/mc146818rtc_early.c" + +#if USE_FAILOVER_IMAGE==0 #include "pc80/serial.c" #include "arch/i386/lib/console.c" @@ -43,12 +45,22 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" #endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" + +#if USE_FAILOVER_IMAGE==0 + +#if CONFIG_USE_INIT == 0 +#include "lib/memcpy.c" + #if CONFIG_USE_PRINTK_IN_CAR == 1 + #include "lib/uart8250.c" + #include "console/vtxprintf.c" + #include "arch/i386/lib/printk_init.c" + #endif +#endif + #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" @@ -137,7 +149,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/model_fxx/init_cpus.c" -#if USE_FALLBACK_IMAGE == 1 +#endif + +#if ((HAVE_FAILOVER_BOOT==1) && (USE_FAILOVER_IMAGE == 1)) || ((HAVE_FAILOVER_BOOT==0) && (USE_FALLBACK_IMAGE == 1)) #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" @@ -184,22 +198,35 @@ void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) fallback_image: // post_code(0x25); +#if HAVE_FAILOVER_BOOT==1 + __asm__ volatile ("jmp __fallback_image" + : /* outputs */ + : "a" (bist), "b" (cpu_init_detectedx) /* inputs */ + ) +#endif ; } #endif - void real_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { - -#if USE_FALLBACK_IMAGE == 1 - failover_process(bist, cpu_init_detectedx); +#if HAVE_FAILOVER_BOOT==1 + #if USE_FAILOVER_IMAGE==1 + failover_process(bist, cpu_init_detectedx); + #else + real_main(bist, cpu_init_detectedx); + #endif +#else + #if USE_FALLBACK_IMAGE == 1 + failover_process(bist, cpu_init_detectedx); + #endif + real_main(bist, cpu_init_detectedx); #endif - real_main(bist, cpu_init_detectedx); - } +#if USE_FAILOVER_IMAGE==0 + void real_main(unsigned long bist, unsigned long cpu_init_detectedx) { static const uint16_t spd_addr [] = { @@ -242,13 +269,17 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset = setup_coherent_ht_domain(); - wait_all_core0_started(); + wait_all_core0_started(); #if CONFIG_LOGICAL_CPUS==1 // It is said that we should start core1 after all core0 launched + /* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, + * So here need to make sure last core0 is started, esp for two way system, + * (there may be apic id conflicts in that case) + */ start_other_cores(); wait_all_other_cores_started(bsp_apicid); #endif - + needs_reset |= ht_setup_chains_x(); if (needs_reset) { @@ -287,3 +318,5 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) post_cache_as_ram(); } + +#endif diff --git a/src/mainboard/amd/serengeti_leopard/cmos.layout b/src/mainboard/amd/serengeti_leopard/cmos.layout index 5eb88b9a5a..c1f3d75316 100644 --- a/src/mainboard/amd/serengeti_leopard/cmos.layout +++ b/src/mainboard/amd/serengeti_leopard/cmos.layout @@ -78,10 +78,10 @@ enumerations 7 9 Fallback_HDD 7 10 Fallback_Floppy #7 3 ROM -8 0 DDR400 -8 1 DDR333 -8 2 DDR266 -8 3 DDR200 +8 0 200Mhz +8 1 166Mhz +8 2 133Mhz +8 3 100Mhz 9 0 off 9 1 87.5% 9 2 75.0% diff --git a/src/mainboard/amd/serengeti_leopard/dx/amd8111.asl b/src/mainboard/amd/serengeti_leopard/dx/amd8111.asl index a26d2b4226..e64bc4a062 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/amd8111.asl +++ b/src/mainboard/amd/serengeti_leopard/dx/amd8111.asl @@ -12,10 +12,10 @@ Name (PICM, Package (0x04) { - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00}, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00}, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00}, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00} + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00} }) Name (DNCG, Ones) @@ -147,20 +147,20 @@ Name (PICM, Package (0x0C) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //USB - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }, - - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //Slot 4 - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }, - - Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, //Slot 3 - Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 } + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //Slot 4 + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, + + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, //Slot 3 + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 } }) Method (_PRT, 0, NotSerialized) diff --git a/src/mainboard/amd/serengeti_leopard/dx/amd8111_pic.asl b/src/mainboard/amd/serengeti_leopard/dx/amd8111_pic.asl index 295b6508a1..228f3f84f1 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/amd8111_pic.asl +++ b/src/mainboard/amd/serengeti_leopard/dx/amd8111_pic.asl @@ -9,7 +9,7 @@ Name (_UID, 0x01) Method (_STA, 0, NotSerialized) { - And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local0) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local0) If (LEqual (Local0, 0x00)) { Return (0x09) } //Disabled Else { Return (0x0B) } //Enabled } @@ -26,7 +26,7 @@ Method (_DIS, 0, NotSerialized) { Store (0x01, Local3) - And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) Store (Local1, Local2) If (LGreater (Local1, 0x07)) { @@ -35,7 +35,7 @@ ShiftLeft (Local3, Local1, Local3) Not (Local3, Local3) - And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) } Method (_CRS, 0, NotSerialized) @@ -48,7 +48,7 @@ CreateByteField (BUFA, 0x02, IRA2) Store (0x00, Local3) Store (0x00, Local4) - And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) If (LNot (LEqual (Local1, 0x00))) { // Routing enable If (LGreater (Local1, 0x07)) @@ -85,8 +85,8 @@ ShiftRight (Local0, 0x01, Local0) } - And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA) - Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) + Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) } } @@ -96,7 +96,7 @@ Name (_UID, 0x02) Method (_STA, 0, NotSerialized) { - And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local0) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local0) If (LEqual (Local0, 0x00)) { Return (0x09) } Else { Return (0x0B) } } @@ -113,7 +113,7 @@ Method (_DIS, 0, NotSerialized) { Store (0x01, Local3) - And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) ShiftRight (Local1, 0x04, Local1) Store (Local1, Local2) If (LGreater (Local1, 0x07)) @@ -123,7 +123,7 @@ ShiftLeft (Local3, Local1, Local3) Not (Local3, Local3) - And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) } Method (_CRS, 0, NotSerialized) @@ -136,7 +136,7 @@ CreateByteField (BUFB, 0x02, IRB2) Store (0x00, Local3) Store (0x00, Local4) - And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1) + And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) ShiftRight (Local1, 0x04, Local1) If (LNot (LEqual (Local1, 0x00))) { @@ -174,9 +174,9 @@ ShiftRight (Local0, 0x01, Local0) } - And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA) + And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) ShiftLeft (Local1, 0x04, Local1) - Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA) + Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) } } @@ -186,7 +186,7 @@ Name (_UID, 0x03) Method (_STA, 0, NotSerialized) { - And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local0) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local0) If (LEqual (Local0, 0x00)) { Return (0x09) } Else { Return (0x0B) } } @@ -203,7 +203,7 @@ Method (_DIS, 0, NotSerialized) { Store (0x01, Local3) - And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) Store (Local1, Local2) If (LGreater (Local1, 0x07)) { @@ -212,7 +212,7 @@ ShiftLeft (Local3, Local1, Local3) Not (Local3, Local3) - And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) } Method (_CRS, 0, NotSerialized) @@ -225,7 +225,7 @@ CreateByteField (BUFA, 0x02, IRA2) Store (0x00, Local3) Store (0x00, Local4) - And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) If (LNot (LEqual (Local1, 0x00))) { If (LGreater (Local1, 0x07)) @@ -262,8 +262,8 @@ ShiftRight (Local0, 0x01, Local0) } - And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC) - Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) + Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) } } @@ -273,7 +273,7 @@ Name (_UID, 0x04) Method (_STA, 0, NotSerialized) { - And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local0) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local0) If (LEqual (Local0, 0x00)) { Return (0x09) } Else { Return (0x0B) } } @@ -290,7 +290,7 @@ Method (_DIS, 0, NotSerialized) { Store (0x01, Local3) - And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) ShiftRight (Local1, 0x04, Local1) Store (Local1, Local2) If (LGreater (Local1, 0x07)) @@ -300,7 +300,7 @@ ShiftLeft (Local3, Local1, Local3) Not (Local3, Local3) - And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) } Method (_CRS, 0, NotSerialized) @@ -313,7 +313,7 @@ CreateByteField (BUFB, 0x02, IRB2) Store (0x00, Local3) Store (0x00, Local4) - And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1) + And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) ShiftRight (Local1, 0x04, Local1) If (LNot (LEqual (Local1, 0x00))) { @@ -351,9 +351,9 @@ ShiftRight (Local0, 0x01, Local0) } - And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC) + And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) ShiftLeft (Local1, 0x04, Local1) - Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC) + Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) } } diff --git a/src/mainboard/amd/serengeti_leopard/dx/amd8131.asl b/src/mainboard/amd/serengeti_leopard/dx/amd8131.asl index 96a7181e3e..e209665e48 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/amd8131.asl +++ b/src/mainboard/amd/serengeti_leopard/dx/amd8131.asl @@ -50,30 +50,30 @@ }) Name (PICM, Package (0x14) { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 },//Slot 2 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKD, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKA, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKB, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKD, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKA, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKC, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 } + Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) { @@ -106,10 +106,10 @@ }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 },//Slot 1 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 } + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) { diff --git a/src/mainboard/amd/serengeti_leopard/dx/amd8151.asl b/src/mainboard/amd/serengeti_leopard/dx/amd8151.asl index 8ce42d3492..001d45b0fe 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/amd8151.asl +++ b/src/mainboard/amd/serengeti_leopard/dx/amd8151.asl @@ -15,10 +15,10 @@ }) Name (PICM, Package (0x04) { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 } + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } }) Method (_PRT, 0, NotSerialized) { diff --git a/src/mainboard/amd/serengeti_leopard/dx/dsdt_lb.dsl b/src/mainboard/amd/serengeti_leopard/dx/dsdt_lb.dsl index 9a7f6b1820..04ec830f08 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/dsdt_lb.dsl +++ b/src/mainboard/amd/serengeti_leopard/dx/dsdt_lb.dsl @@ -25,25 +25,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) { /* BUS0 root bus */ -/* -//hardcode begin - Name (BUSN, Package (0x04) { 0x04010003, 0x06050013, 0x00000000, 0x00000000 }) - Name (MMIO, Package (0x10) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00f43003, 0x00f44f01, 0x0000d003, 0x00efff01, 0x00f40003, 0x00f42f00, 0x00f45003, 0x00f44f00 }) - Name (PCIO, Package (0x08) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001003, 0x00001000, 0x00002003, 0x00002001 }) - Name (SBLK, 0x00) - Name (TOM1, 0x40000000) - - // for AMD opteron we could have four chains, so we will have PCI1, PCI2, PCI3, PCI4 - // PCI1 must be SBLK Chain - // If you have HT IO card that is connected to PCI2, PCI3, PCI4, then you man put Device in SSDT2, SSDT3, SSDT4, - // in acpi_tables.c you can link those SSDT to RSDT according to it's presence. - // Otherwise put the PCI2, PCI3, PCI4 in this dsdt - Name (HCLK, Package (0x04) { 0x00000001, 0x00000011, 0x00000000, 0x00000000 }) //[0,3]=1 enable [4,7]=node_id, [8,15]=linkn - - Name (SBDN, 3) // 8111 UnitID Base -//hardcode end -*/ External (BUSN) External (MMIO) External (PCIO) @@ -52,35 +33,18 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) External (HCLK) External (SBDN) External (HCDN) + External (CBST) + Name (_HID, EisaId ("PNP0A03")) Name (_ADR, 0x00180000) Name (_UID, 0x01) - Name (_BBN, 0) - - // define L1IC Link1 on node0 init completed, so node1 is installed - // We must make sure our bus is 0 ? - OperationRegion (LDT1, PCI_Config, 0xA4, 0x01) - Field (LDT1, ByteAcc, Lock, Preserve) - { - , 5, - L1IC, 1 - } + Name (HCIN, 0x00) // HC1 - } - - Device (PCI1) - { - - Name (HCIN, 0x00) // HC1 - // BUS 1 first HT Chain - Name (_HID, EisaId ("PNP0A03")) - Name (_ADR, 0x00180000) // Fake - Name (_UID, 0x02) Method (_BBN, 0, NotSerialized) { - Return (GBUS (0x00, \_SB.PCI0.SBLK)) + Return (GBUS (GHCN(HCIN), GHCL(HCIN))) } Method (_CRS, 0, NotSerialized) @@ -139,49 +103,21 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) Return (Local3) } - Include ("pci1_hc.asl") + Include ("pci0_hc.asl") } -/* - Device (PCI2) + Device (PCI1) { - - // BUS ? Second HT Chain - Name (HCIN, 0x01) // HC2 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00180000)) - } - Name (_UID, 0x03) - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - + Name (_HID, "PNP0A03") + Name (_ADR, 0x00000000) + Name (_UID, 0x02) Method (_STA, 0, NotSerialized) { - Return (\_SB.GHCE(HCIN)) + Return (\_SB.PCI0.CBST) } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - Include ("pci2_hc.asl") + Name (_BBN, 0x00) } -*/ + } @@ -189,22 +125,22 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) { Method (_L08, 0, NotSerialized) { - Notify (\_SB.PCI1, 0x02) //PME# Wakeup + Notify (\_SB.PCI0, 0x02) //PME# Wakeup } Method (_L0F, 0, NotSerialized) { - Notify (\_SB.PCI1.TP2P.USB0, 0x02) //USB Wakeup + Notify (\_SB.PCI0.TP2P.USB0, 0x02) //USB Wakeup } Method (_L22, 0, NotSerialized) // GPIO18 (LID) - Pogo 0 Bridge B { - Notify (\_SB.PCI1.PG0B, 0x02) + Notify (\_SB.PCI0.PG0B, 0x02) } Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A { - Notify (\_SB.PCI1.PG0A, 0x02) + Notify (\_SB.PCI0.PG0A, 0x02) } } diff --git a/src/mainboard/amd/serengeti_leopard/dx/pci2.asl b/src/mainboard/amd/serengeti_leopard/dx/pci2.asl index a8e80c1617..a62ba98333 100644 --- a/src/mainboard/amd/serengeti_leopard/dx/pci2.asl +++ b/src/mainboard/amd/serengeti_leopard/dx/pci2.asl @@ -18,10 +18,10 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) External (PICF) - External (\_SB.PCI1.LNKA, DeviceObj) - External (\_SB.PCI1.LNKB, DeviceObj) - External (\_SB.PCI1.LNKC, DeviceObj) - External (\_SB.PCI1.LNKD, DeviceObj) + External (\_SB.PCI0.LNKA, DeviceObj) + External (\_SB.PCI0.LNKB, DeviceObj) + External (\_SB.PCI0.LNKC, DeviceObj) + External (\_SB.PCI0.LNKD, DeviceObj) Device (PCI2) { diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111.asl deleted file mode 100644 index e64bc4a062..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111.asl +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Copyright 2005 AMD - */ -//AMD8111 - Name (APIC, Package (0x04) - { - Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present - Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, - Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, - Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13} - }) - - Name (PICM, Package (0x04) - { - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00} - }) - - Name (DNCG, Ones) - - Method (_PRT, 0, NotSerialized) - { - If (LEqual (^DNCG, Ones)) { - Store (DADD(\_SB.PCI0.SBDN, 0x0001ffff), Local0) - // Update the Device Number according to SBDN - Store(Local0, Index (DeRefOf (Index (PICM, 0)), 0)) - Store(Local0, Index (DeRefOf (Index (PICM, 1)), 0)) - Store(Local0, Index (DeRefOf (Index (PICM, 2)), 0)) - Store(Local0, Index (DeRefOf (Index (PICM, 3)), 0)) - - Store(Local0, Index (DeRefOf (Index (APIC, 0)), 0)) - Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0)) - Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0)) - Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0)) - - Store (0x00, ^DNCG) - - } - - If (LNot (PICF)) { - Return (PICM) - } - Else { - Return (APIC) - } - } - - Device (SBC3) - { - /* acpi smbus it should be 0x00040003 if 8131 present */ - Method (_ADR, 0, NotSerialized) - { - Return (DADD(\_SB.PCI0.SBDN, 0x00010003)) - } - OperationRegion (PIRQ, PCI_Config, 0x56, 0x02) - Field (PIRQ, ByteAcc, Lock, Preserve) - { - PIBA, 8, - PIDC, 8 - } -/* - OperationRegion (TS3_, PCI_Config, 0xC4, 0x02) - Field (TS3_, DWordAcc, NoLock, Preserve) - { - PTS3, 16 - } -*/ - } - - Device (HPET) - { - Name (HPT, 0x00) - Name (_HID, EisaId ("PNP0103")) - Name (_UID, 0x00) - Method (_STA, 0, NotSerialized) - { - Return (0x0F) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0xFED00000, 0x00000400) - }) - Return (BUF0) - } - } - - Include ("amd8111_pic.asl") - - Include ("amd8111_isa.asl") - - Device (TP2P) - { - /* 8111 P2P and it should 0x00030000 when 8131 present*/ - Method (_ADR, 0, NotSerialized) - { - Return (DADD(\_SB.PCI0.SBDN, 0x00000000)) - } - - Method (_PRW, 0, NotSerialized) - { - If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x08, 0x03 }) } - Else { Return (Package (0x02) { 0x08, 0x01 }) } - } - - Device (USB0) - { - Name (_ADR, 0x00000000) - Method (_PRW, 0, NotSerialized) - { - If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) } - Else { Return (Package (0x02) { 0x0F, 0x01 }) } - } - } - - Device (USB1) - { - Name (_ADR, 0x00000001) - Method (_PRW, 0, NotSerialized) - { - If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) } - Else { Return (Package (0x02) { 0x0F, 0x01 }) } - } - } - - Name (APIC, Package (0x0C) - { - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, //USB - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, - Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }, - - Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10 }, //Slot 4 - Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11 }, - Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12 }, - Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13 }, - - Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x11 }, //Slot 3 - Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x12 }, - Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 }, - Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 } - }) - - Name (PICM, Package (0x0C) - { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, - - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //Slot 4 - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, - - Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, //Slot 3 - Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 } - }) - - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) { Return (PICM) } - Else { Return (APIC) } - } - } - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_isa.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_isa.asl deleted file mode 100644 index b68230607e..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_isa.asl +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright 2005 AMD - */ -//AMD8111 isa - - Device (ISA) - { - /* lpc 0x00040000 */ - Method (_ADR, 0, NotSerialized) - { - Return (DADD(\_SB.PCI0.SBDN, 0x00010000)) - } - - OperationRegion (PIRY, PCI_Config, 0x51, 0x02) // LPC Decode Registers - Field (PIRY, ByteAcc, NoLock, Preserve) - { - Z000, 2, // Parallel Port Range - , 1, - ECP, 1, // ECP Enable - FDC1, 1, // Floppy Drive Controller 1 - FDC2, 1, // Floppy Drive Controller 2 - Offset (0x01), - Z001, 3, // Serial Port A Range - SAEN, 1, // Serial Post A Enabled - Z002, 3, // Serial Port B Range - SBEN, 1 // Serial Post B Enabled - } - - Device (PIC) - { - Name (_HID, EisaId ("PNP0000")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0020, 0x0020, 0x01, 0x02) - IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02) - IRQ (Edge, ActiveHigh, Exclusive) {2} - }) - } - - Device (DMA1) - { - Name (_HID, EisaId ("PNP0200")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0000, 0x0000, 0x01, 0x10) - IO (Decode16, 0x0080, 0x0080, 0x01, 0x10) - IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20) - DMA (Compatibility, NotBusMaster, Transfer16) {4} - }) - } - - Device (TMR) - { - Name (_HID, EisaId ("PNP0100")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0040, 0x0040, 0x01, 0x04) - IRQ (Edge, ActiveHigh, Exclusive) {0} - }) - } - - Device (RTC) - { - Name (_HID, EisaId ("PNP0B00")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0070, 0x0070, 0x01, 0x06) - IRQ (Edge, ActiveHigh, Exclusive) {8} - }) - } - - Device (SPKR) - { - Name (_HID, EisaId ("PNP0800")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0061, 0x0061, 0x01, 0x01) - }) - } - - Device (COPR) - { - Name (_HID, EisaId ("PNP0C04")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x00F0, 0x00F0, 0x01, 0x10) - IRQ (Edge, ActiveHigh, Exclusive) {13} - }) - } - - Device (SYSR) - { - Name (_HID, EisaId ("PNP0C02")) - Name (_UID, 0x00) - Name (SYR1, ResourceTemplate () - { - IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02) //wrh092302 - added to report Thor NVRAM - IO (Decode16, 0x1100, 0x117F, 0x01, 0x80) //wrh092302 - added to report Thor NVRAM - IO (Decode16, 0x1180, 0x11FF, 0x01, 0x80) - IO (Decode16, 0x0010, 0x0010, 0x01, 0x10) - IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E) - IO (Decode16, 0x0044, 0x0044, 0x01, 0x1C) - IO (Decode16, 0x0062, 0x0062, 0x01, 0x02) - IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B) - IO (Decode16, 0x0076, 0x0076, 0x01, 0x0A) - IO (Decode16, 0x0090, 0x0090, 0x01, 0x10) - IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E) - IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10) - IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error - IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error - }) - Method (_CRS, 0, NotSerialized) - { - Return (SYR1) - } - } - - Device (MEM) - { - Name (_HID, EisaId ("PNP0C02")) - Name (_UID, 0x01) - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF - Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404 - Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC - Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM - Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC - Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS - }) - // Read the Video Memory length - CreateDWordField (BUF0, 0x14, CLEN) - CreateDWordField (BUF0, 0x10, CBAS) - - ShiftLeft (VGA1, 0x09, Local0) - Store (Local0, CLEN) - - Return (BUF0) - } - } - - Device (PS2M) - { - Name (_HID, EisaId ("PNP0F13")) - Name (_CRS, ResourceTemplate () - { - IRQNoFlags () {12} - }) - Method (_STA, 0, NotSerialized) - { - And (FLG0, 0x04, Local0) - If (LEqual (Local0, 0x04)) { Return (0x0F) } - Else { Return (0x00) } - } - } - - Device (PS2K) - { - Name (_HID, EisaId ("PNP0303")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x0060, 0x0060, 0x01, 0x01) - IO (Decode16, 0x0064, 0x0064, 0x01, 0x01) - IRQNoFlags () {1} - }) - } - Include ("superio.asl") - - } - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_pic.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_pic.asl deleted file mode 100644 index 228f3f84f1..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8111_pic.asl +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Copyright 2005 AMD - */ -//AMD8111 pic LNKA B C D - - Device (LNKA) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x01) - Method (_STA, 0, NotSerialized) - { - And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local0) - If (LEqual (Local0, 0x00)) { Return (0x09) } //Disabled - Else { Return (0x0B) } //Enabled - } - - Method (_PRS, 0, NotSerialized) - { - Name (BUFA, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {3,5,10,11} - }) - Return (BUFA) - } - - Method (_DIS, 0, NotSerialized) - { - Store (0x01, Local3) - And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) - Store (Local1, Local2) - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local1) - } - - ShiftLeft (Local3, Local1, Local3) - Not (Local3, Local3) - And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUFA, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {} - }) - CreateByteField (BUFA, 0x01, IRA1) - CreateByteField (BUFA, 0x02, IRA2) - Store (0x00, Local3) - Store (0x00, Local4) - And (\_SB.PCI0.SBC3.PIBA, 0x0F, Local1) - If (LNot (LEqual (Local1, 0x00))) - { // Routing enable - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local2) - ShiftLeft (One, Local2, Local4) - } - Else - { - If (LGreater (Local1, 0x00)) - { - ShiftLeft (One, Local1, Local3) - } - } - - Store (Local3, IRA1) - Store (Local4, IRA2) - } - - Return (BUFA) - } - - Method (_SRS, 1, NotSerialized) - { - CreateByteField (Arg0, 0x01, IRA1) - CreateByteField (Arg0, 0x02, IRA2) - ShiftLeft (IRA2, 0x08, Local0) - Or (Local0, IRA1, Local0) - Store (0x00, Local1) - ShiftRight (Local0, 0x01, Local0) - While (LGreater (Local0, 0x00)) - { - Increment (Local1) - ShiftRight (Local0, 0x01, Local0) - } - - And (\_SB.PCI0.SBC3.PIBA, 0xF0, \_SB.PCI0.SBC3.PIBA) - Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) - } - } - - Device (LNKB) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x02) - Method (_STA, 0, NotSerialized) - { - And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local0) - If (LEqual (Local0, 0x00)) { Return (0x09) } - Else { Return (0x0B) } - } - - Method (_PRS, 0, NotSerialized) - { - Name (BUFB, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {3,5,10,11} - }) - Return (BUFB) - } - - Method (_DIS, 0, NotSerialized) - { - Store (0x01, Local3) - And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) - ShiftRight (Local1, 0x04, Local1) - Store (Local1, Local2) - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local1) - } - - ShiftLeft (Local3, Local1, Local3) - Not (Local3, Local3) - And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUFB, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {} - }) - CreateByteField (BUFB, 0x01, IRB1) - CreateByteField (BUFB, 0x02, IRB2) - Store (0x00, Local3) - Store (0x00, Local4) - And (\_SB.PCI0.SBC3.PIBA, 0xF0, Local1) - ShiftRight (Local1, 0x04, Local1) - If (LNot (LEqual (Local1, 0x00))) - { - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local2) - ShiftLeft (One, Local2, Local4) - } - Else - { - If (LGreater (Local1, 0x00)) - { - ShiftLeft (One, Local1, Local3) - } - } - - Store (Local3, IRB1) - Store (Local4, IRB2) - } - - Return (BUFB) - } - - Method (_SRS, 1, NotSerialized) - { - CreateByteField (Arg0, 0x01, IRB1) - CreateByteField (Arg0, 0x02, IRB2) - ShiftLeft (IRB2, 0x08, Local0) - Or (Local0, IRB1, Local0) - Store (0x00, Local1) - ShiftRight (Local0, 0x01, Local0) - While (LGreater (Local0, 0x00)) - { - Increment (Local1) - ShiftRight (Local0, 0x01, Local0) - } - - And (\_SB.PCI0.SBC3.PIBA, 0x0F, \_SB.PCI0.SBC3.PIBA) - ShiftLeft (Local1, 0x04, Local1) - Or (\_SB.PCI0.SBC3.PIBA, Local1, \_SB.PCI0.SBC3.PIBA) - } - } - - Device (LNKC) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x03) - Method (_STA, 0, NotSerialized) - { - And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local0) - If (LEqual (Local0, 0x00)) { Return (0x09) } - Else { Return (0x0B) } - } - - Method (_PRS, 0, NotSerialized) - { - Name (BUFA, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {3,5,10,11} - }) - Return (BUFA) - } - - Method (_DIS, 0, NotSerialized) - { - Store (0x01, Local3) - And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) - Store (Local1, Local2) - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local1) - } - - ShiftLeft (Local3, Local1, Local3) - Not (Local3, Local3) - And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUFA, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {} - }) - CreateByteField (BUFA, 0x01, IRA1) - CreateByteField (BUFA, 0x02, IRA2) - Store (0x00, Local3) - Store (0x00, Local4) - And (\_SB.PCI0.SBC3.PIDC, 0x0F, Local1) - If (LNot (LEqual (Local1, 0x00))) - { - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local2) - ShiftLeft (One, Local2, Local4) - } - Else - { - If (LGreater (Local1, 0x00)) - { - ShiftLeft (One, Local1, Local3) - } - } - - Store (Local3, IRA1) - Store (Local4, IRA2) - } - - Return (BUFA) - } - - Method (_SRS, 1, NotSerialized) - { - CreateByteField (Arg0, 0x01, IRA1) - CreateByteField (Arg0, 0x02, IRA2) - ShiftLeft (IRA2, 0x08, Local0) - Or (Local0, IRA1, Local0) - Store (0x00, Local1) - ShiftRight (Local0, 0x01, Local0) - While (LGreater (Local0, 0x00)) - { - Increment (Local1) - ShiftRight (Local0, 0x01, Local0) - } - - And (\_SB.PCI0.SBC3.PIDC, 0xF0, \_SB.PCI0.SBC3.PIDC) - Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) - } - } - - Device (LNKD) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x04) - Method (_STA, 0, NotSerialized) - { - And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local0) - If (LEqual (Local0, 0x00)) { Return (0x09) } - Else { Return (0x0B) } - } - - Method (_PRS, 0, NotSerialized) - { - Name (BUFB, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {3,5,10,11} - }) - Return (BUFB) - } - - Method (_DIS, 0, NotSerialized) - { - Store (0x01, Local3) - And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) - ShiftRight (Local1, 0x04, Local1) - Store (Local1, Local2) - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local1) - } - - ShiftLeft (Local3, Local1, Local3) - Not (Local3, Local3) - And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUFB, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {} - }) - CreateByteField (BUFB, 0x01, IRB1) - CreateByteField (BUFB, 0x02, IRB2) - Store (0x00, Local3) - Store (0x00, Local4) - And (\_SB.PCI0.SBC3.PIDC, 0xF0, Local1) - ShiftRight (Local1, 0x04, Local1) - If (LNot (LEqual (Local1, 0x00))) - { - If (LGreater (Local1, 0x07)) - { - Subtract (Local1, 0x08, Local2) - ShiftLeft (One, Local2, Local4) - } - Else - { - If (LGreater (Local1, 0x00)) - { - ShiftLeft (One, Local1, Local3) - } - } - - Store (Local3, IRB1) - Store (Local4, IRB2) - } - - Return (BUFB) - } - - Method (_SRS, 1, NotSerialized) - { - CreateByteField (Arg0, 0x01, IRB1) - CreateByteField (Arg0, 0x02, IRB2) - ShiftLeft (IRB2, 0x08, Local0) - Or (Local0, IRB1, Local0) - Store (0x00, Local1) - ShiftRight (Local0, 0x01, Local0) - While (LGreater (Local0, 0x00)) - { - Increment (Local1) - ShiftRight (Local0, 0x01, Local0) - } - - And (\_SB.PCI0.SBC3.PIDC, 0x0F, \_SB.PCI0.SBC3.PIDC) - ShiftLeft (Local1, 0x04, Local1) - Or (\_SB.PCI0.SBC3.PIDC, Local1, \_SB.PCI0.SBC3.PIDC) - } - } - - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8131.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8131.asl deleted file mode 100644 index e209665e48..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8131.asl +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright 2005 AMD - */ - - Device (PG0A) - { - /* 8132 pcix bridge*/ - Method (_ADR, 0, NotSerialized) - { - Return (DADD(GHCD(HCIN, 0), 0x00000000)) - } - - Method (_PRW, 0, NotSerialized) - { - If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) } - Else { Return (Package (0x02) { 0x29, 0x01 }) } - } - - Name (APIC, Package (0x14) - { - // Slot A - PIRQ BCDA - Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 - Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, - Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, - Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 }, - - //Cypress Slot A - PIRQ BCDA - Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //? - Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, - Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, - Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, - - //Cypress Slot B - PIRQ CDAB - Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //? - Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, - Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, - Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, - - //Cypress Slot C - PIRQ DABC - Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //? - Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, - Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, - Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, - - //Cypress Slot D - PIRQ ABCD - Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //? - Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, - Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, - Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B } - }) - Name (PICM, Package (0x14) - { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - - Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, - - Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, - - Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, - - Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } - }) - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) { Return (PICM) } - Else { Return (APIC) } - } - } - - Device (PG0B) - { - /* 8132 pcix bridge 2 */ - Method (_ADR, 0, NotSerialized) - { - Return (DADD(GHCD(HCIN, 0), 0x00010000)) - } - - Method (_PRW, 0, NotSerialized) - { - If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) } - Else { Return (Package (0x02) { 0x22, 0x01 }) } - } - - Name (APIC, Package (0x04) - { - // Slot A - PIRQ ABCD - Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1 - Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, - Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, - Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 } - }) - Name (PICM, Package (0x04) - { - Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 - Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } - }) - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) { Return (PICM) } - Else { Return (APIC) } - } - } diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8151.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8151.asl deleted file mode 100644 index 001d45b0fe..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amd8151.asl +++ /dev/null @@ -1,29 +0,0 @@ -// AMD8151 - Device (AGPB) - { - Method (_ADR, 0, NotSerialized) - { - Return (DADD(GHCD(HCIN, 0), 0x00010000)) - } - - Name (APIC, Package (0x04) - { - Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, - Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, - Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, - Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 } - }) - Name (PICM, Package (0x04) - { - Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, - Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 } - }) - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) { Return (PICM) } - Else { Return (APIC) } - } - } - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/amdk8_util.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/amdk8_util.asl deleted file mode 100644 index e9155476c5..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/amdk8_util.asl +++ /dev/null @@ -1,315 +0,0 @@ -/* - * Copyright 2005 AMD - */ - -//AMD k8 util for BUSB and res range - - Scope (\_SB) - { - - Name (OSTB, Ones) - Method (OSTP, 0, NotSerialized) - { - If (LEqual (^OSTB, Ones)) - { - Store (0x00, ^OSTB) - } - - Return (^OSTB) - } - - Method (SEQL, 2, Serialized) - { - Store (SizeOf (Arg0), Local0) - Store (SizeOf (Arg1), Local1) - If (LNot (LEqual (Local0, Local1))) { Return (Zero) } - - Name (BUF0, Buffer (Local0) {}) - Store (Arg0, BUF0) - Name (BUF1, Buffer (Local0) {}) - Store (Arg1, BUF1) - Store (Zero, Local2) - While (LLess (Local2, Local0)) - { - Store (DerefOf (Index (BUF0, Local2)), Local3) - Store (DerefOf (Index (BUF1, Local2)), Local4) - If (LNot (LEqual (Local3, Local4))) { Return (Zero) } - - Increment (Local2) - } - - Return (One) - } - - - Method (DADD, 2, NotSerialized) - { - Store( Arg1, Local0) - Store( Arg0, Local1) - Add( ShiftLeft(Local1,16), Local0, Local0) - Return (Local0) - } - - - Method (GHCE, 1, NotSerialized) // check if the HC enabled - { - Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1) - if(LEqual ( And(Local1, 0x01), 0x01)) { Return (0x0F) } - Else { Return (0x00) } - } - - Method (GHCN, 1, NotSerialized) // get the node num for the HC - { - Store (0x00, Local0) - Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1) - Store (ShiftRight( And (Local1, 0xf0), 0x04), Local0) - Return (Local0) - } - - Method (GHCL, 1, NotSerialized) // get the link num on node for the HC - { - Store (0x00, Local0) - Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1) - Store (ShiftRight( And (Local1, 0xf00), 0x08), Local0) - Return (Local0) - } - - Method (GHCD, 2, NotSerialized) // get the unit id base for the HT device in HC - { - Store (0x00, Local0) - Store (DerefOf (Index (\_SB.PCI0.HCDN, Arg0)), Local1) - Store (Arg1, Local2) // Arg1 could be 3, 2, 1, 0 - Multiply (Local2, 0x08, Local2) // change to 24, 16, 8, 0 - Store (And (ShiftRight( Local1, Local2), 0xff), Local0) - Return (Local0) - } - - Method (GBUS, 2, NotSerialized) - { - Store (0x00, Local0) - While (LLess (Local0, 0x04)) - { - Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1) - If (LEqual (And (Local1, 0x03), 0x03)) - { - If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04))) - { - If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08)))) - { - Return (ShiftRight (And (Local1, 0x00FF0000), 0x10)) - } - } - } - - Increment (Local0) - } - - Return (0x00) - } - - Method (GWBN, 2, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x0000, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0000,,,) - }) - CreateWordField (BUF0, 0x08, BMIN) - CreateWordField (BUF0, 0x0A, BMAX) - CreateWordField (BUF0, 0x0E, BLEN) - Store (0x00, Local0) - While (LLess (Local0, 0x04)) - { - Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1) - If (LEqual (And (Local1, 0x03), 0x03)) - { - If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04))) - { - If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08)))) - { - Store (ShiftRight (And (Local1, 0x00FF0000), 0x10), BMIN) - Store (ShiftRight (Local1, 0x18), BMAX) - Subtract (BMAX, BMIN, BLEN) - Increment (BLEN) - Return (RTAG (BUF0)) - } - } - } - - Increment (Local0) - } - - Return (RTAG (BUF0)) - } - - Method (GMEM, 2, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0x00000000, // Address Range Minimum - 0x00000000, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x00000000,,, - , AddressRangeMemory, TypeStatic) - }) - CreateDWordField (BUF0, 0x0A, MMIN) - CreateDWordField (BUF0, 0x0E, MMAX) - CreateDWordField (BUF0, 0x16, MLEN) - Store (0x00, Local0) - Store (0x00, Local4) - Store (0x00, Local3) - While (LLess (Local0, 0x10)) - { - Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local1) - Increment (Local0) - Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local2) - If (LEqual (And (Local1, 0x03), 0x03)) - { - If (LEqual (Arg0, And (Local2, 0x07))) - { - If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04)))) - { - Store (ShiftLeft (And (Local1, 0xFFFFFF00), 0x08), MMIN) - Store (ShiftLeft (And (Local2, 0xFFFFFF00), 0x08), MMAX) - Or (MMAX, 0xFFFF, MMAX) - Subtract (MMAX, MMIN, MLEN) - - If (Local4) - { - Concatenate (RTAG (BUF0), Local3, Local5) - Store (Local5, Local3) - } - Else - { - If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK))) - { - Store (\_SB.PCI0.TOM1, MMIN) - Subtract (MMAX, MMIN, MLEN) - Increment (MLEN) - } - - Store (RTAG (BUF0), Local3) - } - - Increment (Local4) - } - } - } - - Increment (Local0) - } - - If (LNot (Local4)) - { - Store (BUF0, Local3) - } - - Return (Local3) - } - - Method (GIOR, 2, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x00000000, // Address Space Granularity - 0x00000000, // Address Range Minimum - 0x00000000, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x00000000,,, - , TypeStatic) - }) - CreateDWordField (BUF0, 0x0A, PMIN) - CreateDWordField (BUF0, 0x0E, PMAX) - CreateDWordField (BUF0, 0x16, PLEN) - Store (0x00, Local0) - Store (0x00, Local4) - Store (0x00, Local3) - While (LLess (Local0, 0x08)) - { - Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local1) - Increment (Local0) - Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local2) - If (LEqual (And (Local1, 0x03), 0x03)) - { - If (LEqual (Arg0, And (Local2, 0x07))) - { - If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04)))) - { - Store (And (Local1, 0x01FFF000), PMIN) - Store (And (Local2, 0x01FFF000), PMAX) - Or (PMAX, 0x0FFF, PMAX) - Subtract (PMAX, PMIN, PLEN) - Increment (PLEN) - - If (Local4) - { - Concatenate (RTAG (BUF0), Local3, Local5) - Store (Local5, Local3) - } - Else - { - If (LGreater (PMAX, PMIN)) - { - If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK))) - { - Store (0x0D00, PMIN) - Subtract (PMAX, PMIN, PLEN) - Increment (PLEN) - } - - Store (RTAG (BUF0), Local3) - Increment (Local4) - } - - If (And (Local1, 0x10)) - { - Store (0x03B0, PMIN) - Store (0x03DF, PMAX) - Store (0x30, PLEN) - If (Local4) - { - Concatenate (RTAG (BUF0), Local3, Local5) - Store (Local5, Local3) - } - Else - { - Store (RTAG (BUF0), Local3) - } - } - } - - Increment (Local4) - } - } - } - - Increment (Local0) - } - - If (LNot (Local4)) - { - Store (RTAG (BUF0), Local3) - } - - Return (Local3) - } - - Method (RTAG, 1, NotSerialized) - { - Store (Arg0, Local0) - Store (SizeOf (Local0), Local1) - Subtract (Local1, 0x02, Local1) - Multiply (Local1, 0x08, Local1) - CreateField (Local0, 0x00, Local1, RETB) - Store (RETB, Local2) - Return (Local2) - } - } - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/dsdt_lb.dsl b/src/mainboard/amd/serengeti_leopard/dx_bus0/dsdt_lb.dsl deleted file mode 100644 index edf5b47d5d..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/dsdt_lb.dsl +++ /dev/null @@ -1,279 +0,0 @@ -/* - * Copyright 2005 AMD - */ -DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440) -{ - Scope (_PR) - { - Processor (CPU0, 0x00, 0x0000C010, 0x06) {} - Processor (CPU1, 0x01, 0x00000000, 0x00) {} - Processor (CPU2, 0x02, 0x00000000, 0x00) {} - Processor (CPU3, 0x03, 0x00000000, 0x00) {} - - } - - Method (FWSO, 0, NotSerialized) { } - - Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 }) - Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 }) - Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 }) - Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 }) - - Scope (_SB) - { - Device (PCI0) - { - /* BUS0 root bus */ - -/* -//hardcode begin - Name (BUSN, Package (0x04) { 0x04010003, 0x06050013, 0x00000000, 0x00000000 }) - Name (MMIO, Package (0x10) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00f43003, 0x00f44f01, 0x0000d003, 0x00efff01, 0x00f40003, 0x00f42f00, 0x00f45003, 0x00f44f00 }) - Name (PCIO, Package (0x08) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001003, 0x00001000, 0x00002003, 0x00002001 }) - Name (SBLK, 0x00) - Name (TOM1, 0x40000000) - - // for AMD opteron we could have four chains, so we will have PCI1, PCI2, PCI3, PCI4 - // PCI1 must be SBLK Chain - // If you have HT IO card that is connected to PCI2, PCI3, PCI4, then you man put Device in SSDT2, SSDT3, SSDT4, - // in acpi_tables.c you can link those SSDT to RSDT according to it's presence. - // Otherwise put the PCI2, PCI3, PCI4 in this dsdt - Name (HCLK, Package (0x04) { 0x00000001, 0x00000011, 0x00000000, 0x00000000 }) //[0,3]=1 enable [4,7]=node_id, [8,15]=linkn - - Name (SBDN, 3) // 8111 UnitID Base -//hardcode end -*/ - External (BUSN) - External (MMIO) - External (PCIO) - External (SBLK) - External (TOM1) - External (HCLK) - External (SBDN) - External (HCDN) - - - Name (_HID, EisaId ("PNP0A03")) - Name (_ADR, 0x00180000) - Name (_UID, 0x01) - Name (_BBN, 0) - - - // define L1IC Link1 on node0 init completed, so node1 is installed - // We must make sure our bus is 0 ? - OperationRegion (LDT1, PCI_Config, 0xA4, 0x01) - Field (LDT1, ByteAcc, Lock, Preserve) - { - , 5, - L1IC, 1 - } -/* -HT on Bus 0,So no PCI1 - } - - Device (PCI1) - { - // BUS 1 first HT Chain - Name (_HID, EisaId ("PNP0A03")) - Name (_ADR, 0x00180000) // Fake - Name (_UID, 0x02) - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (0x00, \_SB.PCI0.SBLK)) - } - -*/ - Name (HCIN, 0x00) // HC1 - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () - { - IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08) //CF8-CFFh - IO (Decode16, 0xC000, 0xC000, 0x01, 0x80) //8000h - IO (Decode16, 0xC080, 0xC080, 0x01, 0x80) //8080h - - WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, // Address Space Granularity - 0x8100, // Address Range Minimum - 0xFFFF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x7F00,,, - , TypeStatic) //8100h-FFFFh - - DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0x000C0000, // Address Range Minimum - 0x00000000, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x00000000,,, - , AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh - - Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF - - WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x03AF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x03B0,,, - , TypeStatic) //0-CF7h - - WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, - 0x0000, // Address Space Granularity - 0x03E0, // Address Range Minimum - 0x0CF7, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0918,,, - , TypeStatic) //0-CF7h - }) - \_SB.OSTP () - CreateDWordField (BUF0, 0x3E, VLEN) - CreateDWordField (BUF0, 0x36, VMAX) - CreateDWordField (BUF0, 0x32, VMIN) - ShiftLeft (VGA1, 0x09, Local0) - Add (VMIN, Local0, VMAX) - Decrement (VMAX) - Store (Local0, VLEN) - Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1) - Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2) - Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3) - Return (Local3) - } - - Include ("pci1_hc.asl") - - } -/* - Device (PCI2) - { - - // BUS ? Second HT Chain - Name (HCIN, 0x01) // HC2 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00180000)) - } - Name (_UID, 0x03) - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - Include ("pci2_hc.asl") - } -*/ - - } - - Scope (_GPE) - { - Method (_L08, 0, NotSerialized) - { - Notify (\_SB.PCI0, 0x02) //PME# Wakeup - } - - Method (_L0F, 0, NotSerialized) - { - Notify (\_SB.PCI0.TP2P.USB0, 0x02) //USB Wakeup - } - - Method (_L22, 0, NotSerialized) // GPIO18 (LID) - Pogo 0 Bridge B - { - Notify (\_SB.PCI0.PG0B, 0x02) - } - - Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A - { - Notify (\_SB.PCI0.PG0A, 0x02) - } - } - - Method (_PTS, 1, NotSerialized) - { - Or (Arg0, 0xF0, Local0) - Store (Local0, DBG1) - } -/* - Method (_WAK, 1, NotSerialized) - { - Or (Arg0, 0xE0, Local0) - Store (Local0, DBG1) - } -*/ - Name (PICF, 0x00) //Flag Variable for PIC vs. I/O APIC Mode - Method (_PIC, 1, NotSerialized) //PIC Flag and Interface Method - { - Store (Arg0, PICF) - } - - OperationRegion (DEBG, SystemIO, 0x80, 0x01) - Field (DEBG, ByteAcc, Lock, Preserve) - { - DBG1, 8 - } - - OperationRegion (EXTM, SystemMemory, 0x000FF83C, 0x04) - Field (EXTM, WordAcc, Lock, Preserve) - { - AMEM, 32 - } - - OperationRegion (VGAM, SystemMemory, 0x000C0002, 0x01) - Field (VGAM, ByteAcc, Lock, Preserve) - { - VGA1, 8 - } - - OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100) - Field (GRAM, ByteAcc, Lock, Preserve) - { - Offset (0x10), - FLG0, 8 - } - - OperationRegion (GSTS, SystemIO, 0xC028, 0x02) - Field (GSTS, ByteAcc, NoLock, Preserve) - { - , 4, - IRQR, 1 - } - - OperationRegion (Z007, SystemIO, 0x21, 0x01) - Field (Z007, ByteAcc, NoLock, Preserve) - { - Z008, 8 - } - - OperationRegion (Z009, SystemIO, 0xA1, 0x01) - Field (Z009, ByteAcc, NoLock, Preserve) - { - Z00A, 8 - } - - Include ("amdk8_util.asl") - -} - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci1_hc.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/pci1_hc.asl deleted file mode 100644 index b1e9562f6b..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci1_hc.asl +++ /dev/null @@ -1,2 +0,0 @@ - Include ("amd8111.asl") //real SB at first - Include ("amd8131.asl") diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2.asl deleted file mode 100644 index a62ba98333..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2.asl +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright 2005 AMD - */ -DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440) -{ - Scope (_SB) - { - External (DADD, MethodObj) - External (GHCE, MethodObj) - External (GHCN, MethodObj) - External (GHCL, MethodObj) - External (GHCD, MethodObj) - External (GNUS, MethodObj) - External (GIOR, MethodObj) - External (GMEM, MethodObj) - External (GWBN, MethodObj) - External (GBUS, MethodObj) - - External (PICF) - - External (\_SB.PCI0.LNKA, DeviceObj) - External (\_SB.PCI0.LNKB, DeviceObj) - External (\_SB.PCI0.LNKC, DeviceObj) - External (\_SB.PCI0.LNKD, DeviceObj) - - Device (PCI2) - { - - // BUS ? Second HT Chain - Name (HCIN, 0x01) // HC2 - - Name (_HID, "PNP0A03") - - Method (_ADR, 0, NotSerialized) //Fake bus should be 0 - { - Return (DADD(GHCN(HCIN), 0x00180000)) - } - - Name (_UID, 0x03) - - Method (_BBN, 0, NotSerialized) - { - Return (GBUS (GHCN(HCIN), GHCL(HCIN))) - } - - Method (_STA, 0, NotSerialized) - { - Return (\_SB.GHCE(HCIN)) - } - - Method (_CRS, 0, NotSerialized) - { - Name (BUF0, ResourceTemplate () { }) - Store( GHCN(HCIN), Local4) - Store( GHCL(HCIN), Local5) - - Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1) - Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2) - Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3) - Return (Local3) - } - - Include ("pci2_hc.asl") - } - } - -} - diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2_hc.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2_hc.asl deleted file mode 100644 index 045d090392..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/pci2_hc.asl +++ /dev/null @@ -1 +0,0 @@ - Include ("amd8151.asl") diff --git a/src/mainboard/amd/serengeti_leopard/dx_bus0/superio.asl b/src/mainboard/amd/serengeti_leopard/dx_bus0/superio.asl deleted file mode 100644 index 86a10a94ae..0000000000 --- a/src/mainboard/amd/serengeti_leopard/dx_bus0/superio.asl +++ /dev/null @@ -1 +0,0 @@ -// Include ("w83627hf.asl") diff --git a/src/mainboard/amd/serengeti_leopard/get_bus_conf.c b/src/mainboard/amd/serengeti_leopard/get_bus_conf.c index bfdbda6b70..25a5a8ed46 100644 --- a/src/mainboard/amd/serengeti_leopard/get_bus_conf.c +++ b/src/mainboard/amd/serengeti_leopard/get_bus_conf.c @@ -7,9 +7,10 @@ #include <cpu/amd/dualcore.h> #endif +#include <cpu/amd/amdk8_sysconf.h> + // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables -//busnum is default unsigned char bus_isa = 7 ; unsigned char bus_8132_0 = 1; unsigned char bus_8132_1 = 2; @@ -22,8 +23,7 @@ unsigned apicid_8111 ; unsigned apicid_8132_1; unsigned apicid_8132_2; -unsigned sblk; -unsigned pci1234[] = +static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail 0x0000ff0, @@ -35,9 +35,7 @@ unsigned pci1234[] = // 0x0000ff0, // 0x0000ff0 }; -unsigned hc_possible_num; -unsigned sbdn; -unsigned hcdn[] = +static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most 0x20202020, 0x20202020, @@ -48,6 +46,7 @@ unsigned hcdn[] = // 0x20202020, // 0x20202020, }; + unsigned sbdn3; unsigned sbdn5; @@ -61,25 +60,29 @@ void get_bus_conf(void) unsigned apicid_base; device_t dev; + int i; if(get_bus_conf_done==1) return; //do it only once get_bus_conf_done = 1; - hc_possible_num = sizeof(pci1234)/sizeof(pci1234[0]); + sysconf.hc_possible_num = sizeof(pci1234x)/sizeof(pci1234x[0]); + for(i=0;i<sysconf.hc_possible_num; i++) { + sysconf.pci1234[i] = pci1234x[i]; + sysconf.hcdn[i] = hcdnx[i]; + } get_sblk_pci1234(); - sbdn = (hcdn[0] >> 8) & 0xff; - sbdn3 = hcdn[0] & 0xff; - sbdn5 = hcdn[1] & 0xff; + sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff; + sbdn3 = sysconf.hcdn[0] & 0xff; + sbdn5 = sysconf.hcdn[1] & 0xff; -// bus_8132_0 = node_link_to_bus(0, sblk); - bus_8132_0 = (pci1234[0] >> 16) & 0xff; + bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff; bus_8111_0 = bus_8132_0; /* 8111 */ - dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sbdn,0)); + dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0)); if (dev) { bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); #if HT_CHAIN_END_UNITID_BASE >= HT_CHAIN_UNITID_BASE @@ -89,35 +92,35 @@ void get_bus_conf(void) #endif } else { - printk_debug("ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0); + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_8111_0, sysconf.sbdn); } /* 8132-1 */ dev = dev_find_slot(bus_8132_0, PCI_DEVFN(sbdn3,0)); if (dev) { bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); -#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE - bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_isa++; -// printk_debug("bus_isa=%d\n",bus_isa); -#endif } else { - printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8132_0); + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_8132_0, sbdn3); } /* 8132-2 */ dev = dev_find_slot(bus_8132_0, PCI_DEVFN(sbdn3+1,0)); if (dev) { bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); +#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; +// printk_debug("bus_isa=%d\n",bus_isa); +#endif } else { - printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8132_0); + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_8132_0, sbdn3+1); } /* HT chain 1 */ - if((pci1234[1] & 0x1) == 1) { - bus_8151_0 = (pci1234[1] >> 16) & 0xff; + if((sysconf.pci1234[1] & 0x1) == 1) { + bus_8151_0 = (sysconf.pci1234[1] >> 16) & 0xff; /* 8151 */ dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5+1, 0)); @@ -127,6 +130,9 @@ void get_bus_conf(void) bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); bus_isa++; } + else { + printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_8151_0, sbdn5+1); + } } /*I/O APICs: APIC ID Version State Address*/ diff --git a/src/mainboard/amd/serengeti_leopard/irq_tables.c b/src/mainboard/amd/serengeti_leopard/irq_tables.c index 5a6f34e744..0f5887becb 100644 --- a/src/mainboard/amd/serengeti_leopard/irq_tables.c +++ b/src/mainboard/amd/serengeti_leopard/irq_tables.c @@ -9,6 +9,7 @@ #include <string.h> #include <stdint.h> #include <arch/pirq_routing.h> +#include <cpu/amd/amdk8_sysconf.h> static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, @@ -36,10 +37,6 @@ extern unsigned char bus_8111_1; extern unsigned char bus_8151_0; extern unsigned char bus_8151_1; -extern unsigned pci1234[]; - -extern unsigned sbdn; -extern unsigned hcdn[]; extern unsigned sbdn3; extern unsigned sbdn5; @@ -72,7 +69,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->version = PIRQ_VERSION; pirq->rtr_bus = bus_8111_0; - pirq->rtr_devfn = ((sbdn+1)<<3)|0; + pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0; pirq->exclusive_irqs = 0; @@ -86,13 +83,13 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq_info = (void *) ( &pirq->checksum + 1); slot_num = 0; //pci bridge - write_pirq_info(pirq_info, bus_8111_0, ((sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + write_pirq_info(pirq_info, bus_8111_0, ((sysconf.sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; //pcix bridge // write_pirq_info(pirq_info, bus_8132_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); // pirq_info++; slot_num++; - if(pci1234[1] & 0xf) { + if(sysconf.pci1234[1] & 0xf) { //agp bridge write_pirq_info(pirq_info, bus_8151_0, (sbdn5<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); } diff --git a/src/mainboard/amd/serengeti_leopard/mptable.c b/src/mainboard/amd/serengeti_leopard/mptable.c index 16bb74ea45..5d2ed74f7f 100644 --- a/src/mainboard/amd/serengeti_leopard/mptable.c +++ b/src/mainboard/amd/serengeti_leopard/mptable.c @@ -7,6 +7,8 @@ #include <cpu/amd/dualcore.h> #endif +#include <cpu/amd/amdk8_sysconf.h> + extern unsigned char bus_isa; extern unsigned char bus_8132_0; extern unsigned char bus_8132_1; @@ -19,9 +21,6 @@ extern unsigned apicid_8111; extern unsigned apicid_8132_1; extern unsigned apicid_8132_2; -extern unsigned pci1234[]; -extern unsigned sbdn; -extern unsigned hcdn[]; extern unsigned sbdn3; extern unsigned sbdn5; @@ -102,12 +101,12 @@ void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf); //??? What - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sbdn+1)<<2)|3, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|3, apicid_8111, 0x13); // Onboard AMD USB smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13); - if(pci1234[1] & 0xf) { + if(sysconf.pci1234[1] & 0xf) { // Slot AGP smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x11); } |