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| author | Subrata Banik <subrata.banik@intel.com> | 2019-01-29 11:04:25 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-02-07 04:50:37 +0000 |
| commit | 6527b1acc7a020e1f0594a7ea30daed0978dd5fd (patch) | |
| tree | a0d3dddb1fe8fd5df5f8be2f5eee97cb887f89d1 /src/mainboard | |
| parent | 12431d6eef53454907711dcd1545a0540ba57bbe (diff) | |
| download | coreboot-6527b1acc7a020e1f0594a7ea30daed0978dd5fd.tar.xz | |
soc/intel/cannonlake: Add Whiskeylake SoC kconfig
This patch performs below tasks
1. Create SOC_INTEL_COMMON_CANNONLAKE_BASE kconfig.
2. Allow required SoC to select this kconfig to extend CANNONLAKE
SoC support and add incremental changes.
3. Select correct SoC support for hatch, sarien, cflrvps
and whlrvp.
* Hatch is WHL SoC based board
* Sarien is WHL SoC based board
* CFLRVP U/8/11 are CFL SoC based board
* WHLRVP is based on WHL SoC
4. Add correct FSP blobs path for WHL SoC based designs.
Change-Id: I66b63361841f5a16615ddce4225c4f6182eabdb3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/31133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/hatch/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/google/sarien/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/Kconfig.name | 4 |
4 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 01f8e09361..65a3562a2f 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -14,7 +14,7 @@ config BOARD_GOOGLE_BASEBOARD_HATCH select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_SPI_TPM_CR50 select MAINBOARD_HAS_TPM2 - select SOC_INTEL_COFFEELAKE + select SOC_INTEL_WHISKEYLAKE select SYSTEM_TYPE_LAPTOP if BOARD_GOOGLE_BASEBOARD_HATCH diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig index 1216f2da60..dc8f486104 100644 --- a/src/mainboard/google/sarien/Kconfig +++ b/src/mainboard/google/sarien/Kconfig @@ -16,7 +16,7 @@ config BOARD_GOOGLE_BASEBOARD_SARIEN select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK - select SOC_INTEL_COFFEELAKE + select SOC_INTEL_WHISKEYLAKE select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_ACPI_DIS select SPD_READ_BY_WORD diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig b/src/mainboard/intel/coffeelake_rvp/Kconfig index fbfcc0fc1f..d2d4b81013 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig @@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS select GENERIC_SPD_BIN select DRIVERS_I2C_HID select DRIVERS_I2C_GENERIC - select SOC_INTEL_COFFEELAKE select SOC_INTEL_CANNONLAKE_PCH_H if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 select SOC_INTEL_COMMON_BLOCK_HDA_VERB if BOARD_INTEL_COFFEELAKE_RVP11 || BOARD_INTEL_COFFEELAKE_RVP8 || BOARD_INTEL_WHISKEYLAKE_RVP select SOC_INTEL_COMMON_BLOCK_HDA if BOARD_INTEL_WHISKEYLAKE_RVP diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig.name b/src/mainboard/intel/coffeelake_rvp/Kconfig.name index 773c83acc0..70652eff66 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig.name +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig.name @@ -2,9 +2,13 @@ comment "Coffeelake RVP" config BOARD_INTEL_COFFEELAKE_RVPU bool "-> Coffeelake U SO-DIMM DDR4 RVP" + select SOC_INTEL_COFFEELAKE config BOARD_INTEL_COFFEELAKE_RVP11 bool "-> Coffeelake H SO-DIMM DDR4 RVP11" + select SOC_INTEL_COFFEELAKE config BOARD_INTEL_WHISKEYLAKE_RVP bool "-> Whiskeylake U DDR4 RVP" + select SOC_INTEL_WHISKEYLAKE config BOARD_INTEL_COFFEELAKE_RVP8 bool "-> Coffeelake S U-DIMM DDR4 RVP8" + select SOC_INTEL_COFFEELAKE |