summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorMaxim Polyakov <max.senia.poliak@gmail.com>2019-09-12 17:27:10 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-09-14 05:48:22 +0000
commit66d875a143ac4e520eb5e9b6bb79bea9adb6d7e8 (patch)
treed701daa2407acd4e157532457908ed9865ce5f93 /src/mainboard
parent15b0ab51b9d73f0c7669a367c181dedd675ea6d0 (diff)
downloadcoreboot-66d875a143ac4e520eb5e9b6bb79bea9adb6d7e8.tar.xz
mb/asrock/h110m: configure SuperIO global registers
Information based on superiotool dump. Change-Id: I24ae9b1a7eab3095518341354544efe613912a6a Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb20
1 files changed, 15 insertions, 5 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index 88a4edc047..572cd6ab52 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -327,12 +327,22 @@ chip soc/intel/skylake
subsystemid 0x1849 0x1a43
chip superio/nuvoton/nct6791d
device pnp 2e.0 off end # Floppy
- device pnp 2e.1 on # Parallel
- # global
- irq 0x1c = 0x10
+ device pnp 2e.1 on
+ # Global Control Registers
+ # Device IRQ Polarity
+ irq 0x13 = 0x00
+ irq 0x14 = 0x00
+ # Global Option
+ irq 0x24 = 0xfb
irq 0x27 = 0x10
- irq 0x2a = 0x64
- # parallel port
+ # Multi Function
+ irq 0x1a = 0xb0
+ irq 0x1b = 0xe6
+ irq 0x2a = 0x04
+ irq 0x2c = 0x40
+ irq 0x2d = 0x03
+
+ # Parallel Port
io 0x60 = 0x0378
irq 0x70 = 7
drq 0x74 = 4 # No DMA