summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-11-22 12:59:36 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-22 12:59:36 +0000
commit6e9ab97106925f74b993ddf66db0b6525dc71580 (patch)
tree054463939786fb42f43b05d81e6f5b50308f86b8 /src/mainboard
parentabc0c8551604933ca54e9eaa48c3f00e4915dc90 (diff)
downloadcoreboot-6e9ab97106925f74b993ddf66db0b6525dc71580.tar.xz
i855: Remove useless memctrl indirection.
This needlessly complicates the code and increases register pressure on romcc chipsets. We did the same conversion on i440BX, i830, and others. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/digitallogic/adl855pc/romstage.c15
-rw-r--r--src/mainboard/lanner/em8510/romstage.c15
2 files changed, 10 insertions, 20 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c
index aec7d2ab01..a75d60f07a 100644
--- a/src/mainboard/digitallogic/adl855pc/romstage.c
+++ b/src/mainboard/digitallogic/adl855pc/romstage.c
@@ -5,6 +5,7 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
+#include <lib.h>
#include "pc80/udelay_io.c"
#include <pc80/mc146818rtc.h>
#include <console/console.h>
@@ -26,17 +27,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855/raminit.c"
#include "northbridge/intel/i855/reset_test.c"
-#include "lib/generic_sdram.c"
void main(unsigned long bist)
{
- static const struct mem_controller memctrl[] = {
- {
- .d0 = PCI_DEV(0, 0, 1),
- .channel0 = { DIMM0, 0 },
- },
- };
-
if (bist == 0) {
#if 0
enable_lapic();
@@ -58,10 +51,12 @@ void main(unsigned long bist)
if (!bios_reset_detected()) {
enable_smbus();
#if 0
- dump_spd_registers(&memctrl[0]);
+ dump_spd_registers();
dump_smbus_registers();
#endif
- sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
+ sdram_set_registers();
+ sdram_set_spd_registers();
+ sdram_enable();
}
#if 0
diff --git a/src/mainboard/lanner/em8510/romstage.c b/src/mainboard/lanner/em8510/romstage.c
index d3e288a661..24008bcfe6 100644
--- a/src/mainboard/lanner/em8510/romstage.c
+++ b/src/mainboard/lanner/em8510/romstage.c
@@ -27,6 +27,7 @@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
+#include <lib.h>
#include <spd.h>
#include "pc80/udelay_io.c"
#include <pc80/mc146818rtc.h>
@@ -48,17 +49,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/i855/raminit.c"
#include "northbridge/intel/i855/reset_test.c"
-#include "lib/generic_sdram.c"
void main(unsigned long bist)
{
- static const struct mem_controller memctrl[] = {
- {
- .d0 = PCI_DEV(0, 0, 1),
- .channel0 = { DIMM0, 0 },
- },
- };
-
if (bist == 0) {
#if 0
enable_lapic();
@@ -80,10 +73,12 @@ void main(unsigned long bist)
if (!bios_reset_detected()) {
enable_smbus();
#if 1
- dump_spd_registers(&memctrl[0]);
+ dump_spd_registers();
dump_smbus_registers();
#endif
- sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
+ sdram_set_registers();
+ sdram_set_spd_registers();
+ sdram_enable();
}
#if 0