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| author | Greg Watson <jarrah@users.sourceforge.net> | 2003-12-17 17:34:30 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-12-17 17:34:30 +0000 |
| commit | 8549836ef46625aa31ed8554e557652a7d5bc2a4 (patch) | |
| tree | d4fdc099ad81b22adb87aebbda4724a276465265 /src/mainboard | |
| parent | 886b1788c97dfc94c3c7af6f62b7bf6f5a6f303a (diff) | |
| download | coreboot-8549836ef46625aa31ed8554e557652a7d5bc2a4.tar.xz | |
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/embeddedplanet/ep405pc/Config.lb | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/embeddedplanet/ep405pc/Config.lb b/src/mainboard/embeddedplanet/ep405pc/Config.lb index 88594914a6..5b9669b8fc 100644 --- a/src/mainboard/embeddedplanet/ep405pc/Config.lb +++ b/src/mainboard/embeddedplanet/ep405pc/Config.lb @@ -9,18 +9,19 @@ uses UART0_IO_BASE ## ## Set PCI registers ## -option PCIC0_CFGADDR=0xeec00000 -option PCIC0_CFGDATA=0xeec00004 +default PCIC0_CFGADDR=0xeec00000 +default PCIC0_CFGDATA=0xeec00004 ## ## Set UART base address ## -option UART0_IO_BASE=0xef600300 +default UART0_IO_BASE=0xef600300 ## ## Early board initialization, called from ppc_main() ## initobject init.c +driver pci_bridge.c arch ppc end cpu ppc/ppc4xx end |