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authorStefan Reinauer <reinauer@chromium.org>2014-12-19 13:45:24 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-01-06 18:20:32 +0100
commit8de452da2e3219eebd337927c62ddda50ca38323 (patch)
tree14b7ef14804900e8924cfa6989f1e7c155b95bd6 /src/mainboard
parent897123ab2f3bcde00848ae622faeb2ca1e7004f0 (diff)
downloadcoreboot-8de452da2e3219eebd337927c62ddda50ca38323.tar.xz
Drop VIA VT8235 southbridge
It's unused. Change-Id: Iad3e7aa0f777392c9d65b9fcdd3c1666af31723a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/7883 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/via/epia-cn/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 4bf26155c6..e93d26bc5c 100644
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -31,7 +31,7 @@
#include "drivers/pc80/udelay_io.c"
#include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c"
-#include "southbridge/via/vt8235/early_serial.c"
+#include "southbridge/via/vt8237r/early_serial.c"
#include <spd.h>
static inline int spd_read_byte(unsigned device, unsigned address)
@@ -84,7 +84,7 @@ void main(unsigned long bist)
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
- enable_vt8235_serial();
+ enable_vt8237r_serial();
console_init();
enable_smbus();
smbus_fixup(&ctrl);