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authorPatrick Georgi <pgeorgi@chromium.org>2015-06-30 12:49:50 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-06-30 21:33:48 +0200
commit94b8ad48790c23220d5b54eacac97460826d3ab4 (patch)
treedf1aa130c8010d4b861fcf2c3c23f113e9ae519c /src/mainboard
parent961e8a46af0a75063db012997c64d342b0b193f3 (diff)
downloadcoreboot-94b8ad48790c23220d5b54eacac97460826d3ab4.tar.xz
samsung/stumpy: implement get_write_protect_state
Current vboot wants that function. Change-Id: Ie3b49aa716d9711223ec71a142878e847eedfe4e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10726 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/samsung/stumpy/chromeos.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index 8c24c80c95..d579c18d3f 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -48,9 +48,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
/* Write Protect: GPIO68 = CHP3_SPI_WP */
gpios->gpios[0].port = GPIO_SPI_WP;
gpios->gpios[0].polarity = ACTIVE_HIGH;
- gpios->gpios[0].value =
- (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 2)),
- SATA_SP) >> FLAG_SPI_WP) & 1;
+ gpios->gpios[0].value = get_write_protect_state();
strncpy((char *)gpios->gpios[0].name,"write protect",
GPIO_MAX_NAME_LENGTH);
@@ -86,6 +84,17 @@ void fill_lb_gpios(struct lb_gpios *gpios)
}
#endif
+int get_write_protect_state(void)
+{
+ device_t dev;
+#ifdef __PRE_RAM__
+ dev = PCI_DEV(0, 0x1f, 2);
+#else
+ dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2));
+#endif
+ return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1;
+}
+
int get_developer_mode_switch(void)
{
device_t dev;