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authorAaron Durbin <adurbin@chromium.org>2017-11-03 12:24:28 -0600
committerAaron Durbin <adurbin@chromium.org>2017-11-04 02:59:32 +0000
commitb2b2015be04c9e1e5a952bf9a54c4e284e068e9e (patch)
tree33af37a06e14d84c61cf1b997238c48a0fef56b7 /src/mainboard
parent3173d4444ff96c5a65dde041b643785275adb9c9 (diff)
downloadcoreboot-b2b2015be04c9e1e5a952bf9a54c4e284e068e9e.tar.xz
mainboard/google/kahlee: remove unused FILECODE macro
From what I can tell FILECODE isn't used at all in this file. Remove it. Change-Id: Ie88140e63a4917f470f42119c1fe4e8c7d2584ca Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/kahlee/OemCustomize.c2
-rw-r--r--src/mainboard/google/kahlee/bootblock/OemCustomize.c2
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 528c7b3b4b..bbb51e49dc 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -17,8 +17,6 @@
#include <agesawrapper.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
-
static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1),
diff --git a/src/mainboard/google/kahlee/bootblock/OemCustomize.c b/src/mainboard/google/kahlee/bootblock/OemCustomize.c
index 9530169edc..7d86134a07 100644
--- a/src/mainboard/google/kahlee/bootblock/OemCustomize.c
+++ b/src/mainboard/google/kahlee/bootblock/OemCustomize.c
@@ -17,8 +17,6 @@
#include <agesawrapper.h>
#include <PlatformMemoryConfiguration.h>
-#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
-
static const PCIe_PORT_DESCRIPTOR PortList[] = {
/* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/
{