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| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-08-26 13:28:50 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-08-26 13:28:50 +0000 |
| commit | bee6575d7cdc065be6f8b83f9217602e44f29c20 (patch) | |
| tree | 30a2e9b2843b5495942c28b08ee33d2793851e62 /src/mainboard | |
| parent | 235c2545632008bda411d3287fa0fa5f6707144b (diff) | |
| download | coreboot-bee6575d7cdc065be6f8b83f9217602e44f29c20.tar.xz | |
fixed irq tables for hdama
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/arima/hdama/irq_tables.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/arima/hdama/irq_tables.c b/src/mainboard/arima/hdama/irq_tables.c index 002ecee322..5e4437ca11 100644 --- a/src/mainboard/arima/hdama/irq_tables.c +++ b/src/mainboard/arima/hdama/irq_tables.c @@ -13,10 +13,10 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_VERSION, /* u16 version */ 32+16*18, /* there can be total 18 devices on the bus */ 0, /* Where the interrupt router lies (bus) */ - 0x3b, /* Where the interrupt router lies (dev) */ + 0x23, /* Where the interrupt router lies (dev) */ 0, /* IRQs devoted exclusively to PCI usage */ 0x1022, /* Vendor */ - 0x7400, /* Device */ + 0x746b, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x35, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ @@ -25,8 +25,8 @@ const struct irq_routing_table intel_irq_routing_table = { {0,0x50, {{0x1, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0}, {0x2,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x3, 0}, {0x2,0x10, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0}, - {0x2,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x7, 0}, - {0x2,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x8, 0}, + {0x1,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0}, + {0x1,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0}, {0x2,0x28, {{0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0xa, 0}, {0,0x58, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0}, {0x3,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x1, 0}, |