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authorMaulik V Vaghela <maulik.v.vaghela@intel.com>2020-03-30 20:15:01 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-04-21 05:48:21 +0000
commitef5ff0b49a5d61b8dfc313fdddba3f07e3f7a8fc (patch)
tree850d9d0f79ed4bf2834adbd1a5db6bb9021e4dc2 /src/mainboard
parentaa832c19b2c3e4f1be6b917abd962a7d664be7a3 (diff)
downloadcoreboot-ef5ff0b49a5d61b8dfc313fdddba3f07e3f7a8fc.tar.xz
mb/intel/jasperlake_rvp: Enable Wifi and BT
Enable Wifi and Bluetooth for Jasper Lake RVP with following changes: 1. Enable related pci root ports for WLAN and BT 2. Disable unused root ports and clkreq for unused clocks 3. Configure GPIOs properly for M.2 port BUG=None BRANCH=None TEST=Code compiles and able to detect Wifi/BT module on board. Change-Id: Ifbd07022c05769c04ecd49c81a4430947125b32a Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39933 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb25
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c18
2 files changed, 29 insertions, 14 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index b632b7804c..7dc45ae520 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -63,22 +63,19 @@ chip soc/intel/jasperlake
register "PchHdaAudioLinkDmicEnable[1]" = "1"
# PCIe port 1 for M.2 E-key WLAN
- register "PcieRpEnable[1]" = "1"
-
- # RP 1 uses CLK SRC 1
- register "PcieClkSrcUsage[1]" = "0x01"
-
- # ClkReq-to-ClkSrc mapping for CLK SRC 1
- register "PcieClkSrcClkReq[1]" = "0x01"
-
# Enable Root Port 4(x4) for NVMe
+ register "PcieRpEnable[1]" = "1"
register "PcieRpEnable[4]" = "1"
- # RP 4 uses CLK SRC 0
register "PcieClkSrcUsage[0]" = "0x04"
+ register "PcieClkSrcUsage[1]" = "0x01"
- # ClkReq-to-ClkSrc mapping for CLK SRC 0
register "PcieClkSrcClkReq[0]" = "0x00"
+ register "PcieClkSrcClkReq[1]" = "0x01"
+ register "PcieClkSrcClkReq[2]" = "0x02"
+ register "PcieClkSrcClkReq[3]" = "0x03"
+ register "PcieClkSrcClkReq[4]" = "0x04"
+ register "PcieClkSrcClkReq[5]" = "0x05"
register "SataEnable" = "0"
@@ -285,12 +282,12 @@ chip soc/intel/jasperlake
device pci 19.1 off end # I2C #5
device pci 19.2 on end # UART #2
device pci 1a.0 on end # eMMC
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 on end # PCI Express Port 2
+ device pci 1c.0 on end # PCI Express Port 1
+ device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 on end # PCI Express Port 5
- device pci 1c.5 off end # PCI Express Port 6
+ device pci 1c.4 off end # PCI Express Port 5
+ device pci 1c.5 on end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8
device pci 1e.0 on end # UART #0
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
index 744a299af9..68f57ffd60 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
@@ -15,6 +15,9 @@ static const struct pad_config gpio_table[] = {
/* M.2_WWAN_DISABLE_N */
PAD_CFG_GPO(GPP_A19, 1, PLTRST),
+ /* M.2_WLAN_PERST_N */
+ PAD_CFG_GPO(GPP_B17, 1, PLTRST),
+
/* WWAN_PERST_N */
PAD_CFG_GPO(GPP_C0, 0, PLTRST),
@@ -27,6 +30,12 @@ static const struct pad_config gpio_table[] = {
/* I2C0_SCL */
PAD_CFG_NF(GPP_C17, UP_2K, DEEP, NF1),
+ /* WIFI_RF_KILL_N */
+ PAD_CFG_GPO(GPP_D0, 1, PLTRST),
+
+ /* BT_RF_KILL_N */
+ PAD_CFG_GPO(GPP_D1, 1, PLTRST),
+
/* I2S_MCLK */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
@@ -36,12 +45,21 @@ static const struct pad_config gpio_table[] = {
/* WWAN EN GPIO */
PAD_CFG_GPO(GPP_H7, 1, PLTRST),
+ /* M.2_BT_I2S2_SCLK */
+ PAD_CFG_GPI(GPP_H11, NONE, PLTRST),
+
+ /* M.2_BT_I2S2_RXD */
+ PAD_CFG_GPI(GPP_H14, NONE, PLTRST),
+
/* I2S1_SCLK */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
/* Audio Jack Detection */
PAD_CFG_GPI_INT(GPP_H16, NONE, PLTRST, EDGE_BOTH),
+ /* M2_CNVI_EN_N */
+ PAD_CFG_GPO(GPP_H19, 0, PLTRST),
+
/* I2S0_SCLK */
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2),