diff options
| author | Jens Rottmann <JRottmann@LiPPERTembedded.de> | 2013-03-07 19:02:15 +0100 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-08 00:56:19 +0100 |
| commit | 00d673d165006b28bbbe5b2d84ef80d8665d8f34 (patch) | |
| tree | 8029dce6c1c0ed034c3c2d966939cf8572d95290 /src/mainboard | |
| parent | 45f72ce60f41a655514c29698678cf3c1fb0c1a9 (diff) | |
| download | coreboot-00d673d165006b28bbbe5b2d84ef80d8665d8f34.tar.xz | |
FrontRunner/Toucan-AF: lower SPI speed to 22 MHz
The Hudson-E1's default SPI speed for normal i.e. non-fast reads is 66 MHz,
but the SST 25VF032B datasheet allows max. 25. Lower the speed to 22 MHz,
otherwise BIOS flashing fails.
Change-Id: I22e87d833a3ebd316b6e873595a2480831533ab1
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2605
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/lippert/frontrunner-af/mainboard.c | 5 | ||||
| -rw-r--r-- | src/mainboard/lippert/toucan-af/mainboard.c | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 83c90f391a..72f2793cc4 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -87,6 +87,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data) static void init(struct device *dev) { + volatile u8 *spi_base; // base addr of Hudson's SPI host controller int i; printk(BIOS_DEBUG, CONFIG_MAINBOARD_PART_NUMBER " ENTER %s\n", __func__); @@ -123,6 +124,10 @@ static void init(struct device *dev) outb((u8)val, SIO_RUNTIME_BASE + (val >> 8)); } + /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ + spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register + /* Notify the SMC we're alive and kicking, or after a while it will * effect a power cycle and switch to the alternate BIOS chip. * Should be done as late as possible. */ diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index 27952fa33d..367397e97c 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -56,6 +56,7 @@ static int smb_write_blk(u8 slave, u8 command, u8 length, const u8 *data) static void init(struct device *dev) { + volatile u8 *spi_base; // base addr of Hudson's SPI host controller int i; printk(BIOS_DEBUG, CONFIG_MAINBOARD_PART_NUMBER " ENTER %s\n", __func__); @@ -90,6 +91,10 @@ static void init(struct device *dev) printk(BIOS_INFO, "Board revision ID: %u\n", fch_gpio_state(58)<<2 | fch_gpio_state(57)<<1 | fch_gpio_state(56)); + /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ + spi_base = (u8*)(pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register + /* Notify the SMC we're alive and kicking, or after a while it will * effect a power cycle and switch to the alternate BIOS chip. * Should be done as late as possible. */ |