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authorsanthosh hassan <sahassan@google.com>2019-03-09 02:28:43 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-20 13:54:37 +0000
commit0eb4db185cfef44ddfdbd91d4fe69a48c127fa84 (patch)
tree0c484dea0ebd490533e25bfba8846442b35cd926 /src/mainboard
parent0dd80aab25200c4bba26aa6b9fc24f3e967e3f6a (diff)
downloadcoreboot-0eb4db185cfef44ddfdbd91d4fe69a48c127fa84.tar.xz
google/mistral: Implement board reset
Implement reset using PSHOLD. Change-Id: I472bf73cc7b227187b284a3730ec5dea5373695c Signed-off-by: Santhosh HassanĀ <sahassan@google.com> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/mistral/Kconfig1
-rw-r--r--src/mainboard/google/mistral/Makefile.inc4
-rw-r--r--src/mainboard/google/mistral/reset.c35
3 files changed, 39 insertions, 1 deletions
diff --git a/src/mainboard/google/mistral/Kconfig b/src/mainboard/google/mistral/Kconfig
index f8e8ac76b0..d1ab9c4f11 100644
--- a/src/mainboard/google/mistral/Kconfig
+++ b/src/mainboard/google/mistral/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_QUALCOMM_QCS405
select SPI_FLASH
select MAINBOARD_HAS_CHROMEOS
- select MISSING_BOARD_RESET
config VBOOT
select VBOOT_VBNV_FLASH
diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc
index 31dc79fff9..dfb0bbc974 100644
--- a/src/mainboard/google/mistral/Makefile.inc
+++ b/src/mainboard/google/mistral/Makefile.inc
@@ -1,14 +1,18 @@
bootblock-y += memlayout.ld
bootblock-y += chromeos.c
+bootblock-y += reset.c
bootblock-y += bootblock.c
verstage-y += memlayout.ld
verstage-y += chromeos.c
+verstage-y += reset.c
romstage-y += memlayout.ld
romstage-y += chromeos.c
+romstage-y += reset.c
ramstage-y += memlayout.ld
ramstage-y += chromeos.c
+ramstage-y += reset.c
ramstage-y += mainboard.c
diff --git a/src/mainboard/google/mistral/reset.c b/src/mainboard/google/mistral/reset.c
new file mode 100644
index 0000000000..107e79c888
--- /dev/null
+++ b/src/mainboard/google/mistral/reset.c
@@ -0,0 +1,35 @@
+/*
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/mmio.h>
+#include <reset.h>
+
+#define GCNT_PSHOLD ((void *)0x004AB000u)
+#define TCSR_BOOT_MISC_DETECT ((void *)0x0193D100)
+#define TCSR_RESET_DEBUG_SW_ENTRY ((void *)0x01940000)
+
+void do_board_reset(void)
+{
+ /*
+ * At boot time the boot loaders would have set a magic cookie
+ * here to detect watchdog reset. However, since this is a
+ * normal reset clear the magic numbers.
+ */
+ write32(TCSR_BOOT_MISC_DETECT, 0);
+ write32(TCSR_RESET_DEBUG_SW_ENTRY, 0);
+ write32(GCNT_PSHOLD, 0);
+}