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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-01 18:04:05 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-03 09:35:38 +0200
commit1b3acb13e49753e53192d3e5b939713329d0d205 (patch)
tree64ff2b240afcfb63e0c4f4b86859f6ce8404e7b2 /src/mainboard
parentd235da108b38ad45f20c3e556e630b10fb16634e (diff)
downloadcoreboot-1b3acb13e49753e53192d3e5b939713329d0d205.tar.xz
superio/ite/it8772f: Move towards removing #include .c
Move samsung/stumpy board towards generic romstage component and away from poorly written hard-coded model specific Super I/O component. This is an incremental step towards getting obj-level abstraction between board and Super I/O. Change-Id: I358c5abef85c2ffa1b7178025cde8834a35b0a51 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5899 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index 0067cb55ba..0ae71a8c0a 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -31,7 +31,9 @@
#include <cbmem.h>
#include <console/console.h>
#include <bootmode.h>
-#include "superio/ite/it8772f/it8772f.h"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8772f/it8772f.h>
+/* FIXME: SUPERIO include.c */
#include "superio/ite/it8772f/early_serial.c"
#include "northbridge/intel/sandybridge/sandybridge.h"
#include "northbridge/intel/sandybridge/raminit.h"
@@ -58,6 +60,9 @@
#endif
#define USB_RESET_DISABLE_MAGIC (0xdd) /* Disable if set to this */
+#define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO)
+
static void pch_enable_lpc(void)
{
/* Set COM1/COM2 decode range */
@@ -233,10 +238,9 @@ void main(unsigned long bist)
setup_sio_gpios();
/* Early SuperIO setup */
- it8772f_kill_watchdog();
it8772f_ac_resume_southbridge();
- it8772f_enable_serial(PNP_DEV(IT8772F_BASE, IT8772F_SP1),
- CONFIG_TTYS0_BASE);
+ ite_kill_watchdog(GPIO_DEV);
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
init_bootmode_straps();