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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-18 14:51:41 -0600
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-06 04:09:47 +0000
commit47818b4d6017b89e398cfbc86e3c437e0f81cfdf (patch)
treee48d6742987cb1bea9c0a86edd2f8170ad4acb6a /src/mainboard
parentcc3284219460351c00a153b204a561a89bcec92e (diff)
downloadcoreboot-47818b4d6017b89e398cfbc86e3c437e0f81cfdf.tar.xz
fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO
POST_IO is a user-visible config bool. fsp_1_0/cache_as_ram.inc made a mess of it, by forcing a build-time error when CONFIG_POST_IO was not being set. fsp 1.0 boards ended 'select'ing this in their Kconfig. Refactor fsp/cache_as_ram.inc handling of POST codes, and remove the "select POST_IO" from boards that have it. Instead of implementing an ad-hoc changing post code display and a delay based on port 0xed, just encode the FSP failure code in the POST code. Since FSP failure codes are > 16, we can encode the failure code in the lower nibble, and theirfailing function in the upper nibble. Change-Id: Iaa3e6533e8406b16ec0689abd704984d79293952 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/8485 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/bakersport_fsp/Kconfig1
-rw-r--r--src/mainboard/intel/bayleybay_fsp/Kconfig1
-rw-r--r--src/mainboard/intel/minnowmax/Kconfig4
3 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/intel/bakersport_fsp/Kconfig b/src/mainboard/intel/bakersport_fsp/Kconfig
index 3575ab30e0..0e18423f4b 100644
--- a/src/mainboard/intel/bakersport_fsp/Kconfig
+++ b/src/mainboard/intel/bakersport_fsp/Kconfig
@@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_2048
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
- select POST_IO
select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
select TSC_MONOTONIC_TIMER
diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig
index 9897cfccc4..8bf79b2ca4 100644
--- a/src/mainboard/intel/bayleybay_fsp/Kconfig
+++ b/src/mainboard/intel/bayleybay_fsp/Kconfig
@@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_2048
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
- select POST_IO
select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
select TSC_MONOTONIC_TIMER
diff --git a/src/mainboard/intel/minnowmax/Kconfig b/src/mainboard/intel/minnowmax/Kconfig
index 39f84f125f..e09efc9582 100644
--- a/src/mainboard/intel/minnowmax/Kconfig
+++ b/src/mainboard/intel/minnowmax/Kconfig
@@ -63,10 +63,6 @@ config VIRTUAL_ROM_SIZE
depends on ENABLE_FSP_FAST_BOOT
default 0x800000
-config POST_IO
- bool
- default n
-
config POST_DEVICE
bool
default n