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authorJonathan Kollasch <jakllsch@kollasch.net>2010-10-26 16:10:20 +0000
committerJonathan A. Kollasch <jakllsch@kollasch.net>2010-10-26 16:10:20 +0000
commit4a8d9938b24e54321b9b68e56af5ea4437cf65d5 (patch)
tree4e5ec702806a6c297a58066146895be37db6f66c /src/mainboard
parent9d4212fff2e3a66b3a319a5cf094df539cf7b599 (diff)
downloadcoreboot-4a8d9938b24e54321b9b68e56af5ea4437cf65d5.tar.xz
Convert all ck804-based boards to tiny bootblock.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asus/a8n_e/romstage.c4
-rw-r--r--src/mainboard/msi/ms7135/romstage.c4
-rw-r--r--src/mainboard/sunw/ultra40/romstage.c4
-rw-r--r--src/mainboard/tyan/s2891/romstage.c4
-rw-r--r--src/mainboard/tyan/s2892/romstage.c4
-rw-r--r--src/mainboard/tyan/s2895/romstage.c4
6 files changed, 0 insertions, 24 deletions
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c
index c0821f9bc6..6cddfd21a3 100644
--- a/src/mainboard/asus/a8n_e/romstage.c
+++ b/src/mainboard/asus/a8n_e/romstage.c
@@ -79,7 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -119,9 +118,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0)
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 47da5bca44..82195d59b3 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -85,7 +85,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -126,9 +125,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0) {
diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index 992d0abde1..b45b832245 100644
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -97,7 +97,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -147,9 +146,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0) {
diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c
index ad8e9767dd..494b71d33a 100644
--- a/src/mainboard/tyan/s2891/romstage.c
+++ b/src/mainboard/tyan/s2891/romstage.c
@@ -69,7 +69,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -122,9 +121,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0) {
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c
index cf601cc050..b15fda2cc6 100644
--- a/src/mainboard/tyan/s2892/romstage.c
+++ b/src/mainboard/tyan/s2892/romstage.c
@@ -75,7 +75,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -116,9 +115,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0) {
diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c
index 258e75f5fa..4b6cd0ac49 100644
--- a/src/mainboard/tyan/s2895/romstage.c
+++ b/src/mainboard/tyan/s2895/romstage.c
@@ -89,7 +89,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
-#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -140,9 +139,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enumerate_ht_chain();
sio_setup();
-
- /* Setup the ck804 */
- ck804_enable_rom();
}
if (bist == 0) {