diff options
author | John Zhao <john.zhao@intel.com> | 2020-09-08 09:44:44 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-14 07:03:33 +0000 |
commit | 623da4bc5da225d429d0802f60f1a25b84e31577 (patch) | |
tree | 3f79eb9ea186d03a8b101e71822437342d724e40 /src/mainboard | |
parent | d944f1797fe811f1ae89bfeefb8f44b781b5b0a3 (diff) | |
download | coreboot-623da4bc5da225d429d0802f60f1a25b84e31577.tar.xz |
mb/google/volteer: Add error handling
Coverity detects missing error handling after calling function
tlcl_lib_init. This change checks the function tlcl_lib_init return
value and handles error properly.
Found-by: Coverity CID 1432491
TEST=None
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: Ife38b1450451cb25e5479760d640375db153e499
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/volteer/mainboard.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c index 849869a2c8..23c3e92569 100644 --- a/src/mainboard/google/volteer/mainboard.c +++ b/src/mainboard/google/volteer/mainboard.c @@ -12,6 +12,7 @@ #include <soc/ramstage.h> #include <vendorcode/google/chromeos/chromeos.h> #include <variant/gpio.h> +#include <vb2_api.h> static void mainboard_init(struct device *dev) { @@ -43,7 +44,13 @@ static void mainboard_enable(struct device *dev) void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg) { - tlcl_lib_init(); + int ret; + ret = tlcl_lib_init(); + if (ret != VB2_SUCCESS) { + printk(BIOS_ERR, "tlcl_lib_init() failed: 0x%x\n", ret); + return; + } + if (cr50_is_long_interrupt_pulse_enabled()) { printk(BIOS_INFO, "Enabling S0i3.4\n"); } else { |