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authorArthur Heymans <arthur@aheymans.xyz>2019-05-23 14:41:19 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-29 20:17:48 +0000
commit73ac12196c61c8d0c21a54dfa87b858662d6859a (patch)
tree225d0510e4df457989fd6add4d994354930af4e7 /src/mainboard
parent1ac5ecbfd1acf79f3bea288ef644c28ba54cc685 (diff)
downloadcoreboot-73ac12196c61c8d0c21a54dfa87b858662d6859a.tar.xz
drivers/intel/fsp1.1: Simplify bootflow and clean up
This gets rid of the boilerplate back and forward calls between the SOC/FSP-driver code and mainboard code. Change-Id: I5d4a10d1da6b3ac5e65efd7f82607b56b80e08d4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32961 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/cyan/romstage.c7
-rw-r--r--src/mainboard/google/glados/romstage.c4
-rw-r--r--src/mainboard/intel/kunimitsu/romstage.c6
-rw-r--r--src/mainboard/intel/saddlebrook/romstage.c6
-rw-r--r--src/mainboard/intel/strago/romstage.c2
5 files changed, 1 insertions, 24 deletions
diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c
index c877e42055..dea73e9eee 100644
--- a/src/mainboard/google/cyan/romstage.c
+++ b/src/mainboard/google/cyan/romstage.c
@@ -19,13 +19,6 @@
#include "spd/spd_util.h"
-/* All FSP specific code goes in this block */
-void mainboard_romstage_entry(struct romstage_params *rp)
-{
- /* Call back into chipset code with platform values updated. */
- romstage_common(rp);
-}
-
void mainboard_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *memory_params)
{
diff --git a/src/mainboard/google/glados/romstage.c b/src/mainboard/google/glados/romstage.c
index 47524c28ba..f2daa38d00 100644
--- a/src/mainboard/google/glados/romstage.c
+++ b/src/mainboard/google/glados/romstage.c
@@ -25,15 +25,13 @@
#include "spd/spd_util.h"
#include "spd/spd.h"
-void mainboard_romstage_entry(struct romstage_params *params)
+void mainboard_pre_raminit(struct romstage_params *params)
{
#ifdef EC_ENABLE_KEYBOARD_BACKLIGHT
/* Turn on keyboard backlight to indicate we are booting */
if (params->power_state->prev_sleep_state != ACPI_S3)
google_chromeec_kbbacklight(25);
#endif
- /* Initialize memory */
- romstage_common(params);
}
void mainboard_memory_init_params(struct romstage_params *params,
diff --git a/src/mainboard/intel/kunimitsu/romstage.c b/src/mainboard/intel/kunimitsu/romstage.c
index f25f88b4dd..f900ca319b 100644
--- a/src/mainboard/intel/kunimitsu/romstage.c
+++ b/src/mainboard/intel/kunimitsu/romstage.c
@@ -20,12 +20,6 @@
#include "gpio.h"
#include "spd/spd.h"
-void mainboard_romstage_entry(struct romstage_params *params)
-{
- /* Initialize memory */
- romstage_common(params);
-}
-
void mainboard_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *memory_params)
{
diff --git a/src/mainboard/intel/saddlebrook/romstage.c b/src/mainboard/intel/saddlebrook/romstage.c
index 48d39db309..82b85fd700 100644
--- a/src/mainboard/intel/saddlebrook/romstage.c
+++ b/src/mainboard/intel/saddlebrook/romstage.c
@@ -33,12 +33,6 @@ void car_mainboard_pre_console_init(void)
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
-void mainboard_romstage_entry(struct romstage_params *params)
-{
- post_code(0x31);
- romstage_common(params);
-}
-
void mainboard_memory_init_params(
struct romstage_params *params,
MEMORY_INIT_UPD *memory_params)
diff --git a/src/mainboard/intel/strago/romstage.c b/src/mainboard/intel/strago/romstage.c
index ba0ff7b85e..1dc7ba32fc 100644
--- a/src/mainboard/intel/strago/romstage.c
+++ b/src/mainboard/intel/strago/romstage.c
@@ -14,8 +14,6 @@
* GNU General Public License for more details.
*/
-#include <soc/gpio.h>
-#include <soc/pci_devs.h>
#include <soc/romstage.h>
#include "onboard.h"
#include <boardid.h>