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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-08-12 07:38:01 +0200
committerPatrick Rudolph <siro@das-labor.org>2020-08-18 05:54:09 +0000
commit7bcef3a40699df06e54a2c835412c2c92d14e386 (patch)
tree55306d0b15aab6a5d9b297614255598db9864437 /src/mainboard
parent49ae596a5907bd545e344d540004d05a7ff000e0 (diff)
downloadcoreboot-7bcef3a40699df06e54a2c835412c2c92d14e386.tar.xz
mb/prodrive/hermes: Enable LPSS ACPI driver
Enable the introduced LPSS ACPI uart driver. Tested on Hermes using Linux 5.6: The UART2 appears as /dev/ttyS2. Change-Id: Ic15be4a807012216e52c848120de7e39522f57b7 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index d1694dce5a..c3d148d4c1 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -176,8 +176,11 @@ chip soc/intel/cannonlake
# This device does not have any function on CNP-H, but it needs
# to be here so that the resource allocator is aware of UART 2.
device pci 19.0 hidden end
- device pci 19.2 hidden end # UART #2, in ACPI mode
-
+ chip soc/intel/common/block/uart
+ device pci 19.2 hidden
+ register "devid" = "PCI_DEVICE_ID_INTEL_CNP_H_UART2"
+ end # UART #2, in ACPI mode
+ end
device pci 1b.4 on
smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "SLOT1" "SlotDataBusWidth4X"
end # PCIe Slot 1