diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2016-10-03 17:16:48 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2016-12-11 14:17:06 +0100 |
commit | 885c289bba6554545ae21896a318f71e4ccb16a8 (patch) | |
tree | 5be0a90c4d425bc950454c079ae0bbf311daf328 /src/mainboard | |
parent | 43e9c93eba3767f990aba518ef3e38c7a8892212 (diff) | |
download | coreboot-885c289bba6554545ae21896a318f71e4ccb16a8.tar.xz |
nb/intel/i945: Make pci_mmio_size a devicetree parameter
Instead of hardcoding pci_mmio_size in the raminit code,
this makes it a parameter in the devicetree.
A safe minimum of 768M is also defined since using anything
less causes problems (if 4G of ram is used).
Change-Id: If004c861464162d5dbbc61836a3a205d1619dfd5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16856
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/apple/macbook21/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/getac/p470/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/ibase/mb899/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/kontron/986lcd-m/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t60/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/x60/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/roda/rk886ex/devicetree.cb | 2 |
9 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb index 4bbe28db1b..f37e768b76 100644 --- a/src/mainboard/apple/macbook21/devicetree.cb +++ b/src/mainboard/apple/macbook21/devicetree.cb @@ -30,6 +30,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x8086 0x7270 diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb index 4771a3ac0f..415d9a3945 100644 --- a/src/mainboard/getac/p470/devicetree.cb +++ b/src/mainboard/getac/p470/devicetree.cb @@ -25,6 +25,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb index 655065a2d9..acf743b18c 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb @@ -25,6 +25,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on # host bridge subsystemid 0x1458 0x5000 diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb index 77ceaddc52..c63e5d645f 100644 --- a/src/mainboard/ibase/mb899/devicetree.cb +++ b/src/mainboard/ibase/mb899/devicetree.cb @@ -9,6 +9,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index aa8c441664..e8c2792420 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -21,6 +21,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on subsystemid 0x8086 0x464c inherit device pci 00.0 on end # host bridge diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb index 6795cdc38e..c768b64f4c 100644 --- a/src/mainboard/kontron/986lcd-m/devicetree.cb +++ b/src/mainboard/kontron/986lcd-m/devicetree.cb @@ -9,6 +9,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on end # host bridge device pci 01.0 off end # i945 PCIe root port diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 2dc9f4535d..f66455bcce 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -30,6 +30,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2015 diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index e2a24c1232..0ac92737c2 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -30,6 +30,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2017 diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb index 15c0fd0ea5..28f8f434c1 100644 --- a/src/mainboard/roda/rk886ex/devicetree.cb +++ b/src/mainboard/roda/rk886ex/devicetree.cb @@ -25,6 +25,8 @@ chip northbridge/intel/i945 end end + register "pci_mmio_size" = "768" + device domain 0 on subsystemid 0x4352 0x6886 inherit device pci 00.0 on end # host bridge |