diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-11-18 13:50:02 -0600 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-07 22:06:10 +0200 |
| commit | baa1e382178ab6a45c5d584a88ac26c0767f8a12 (patch) | |
| tree | 5aec4a39e8e1f7bc0a6642f1e2b6b404f72954c3 /src/mainboard | |
| parent | 6f9947a3ec2cf481dbb233660a29f757a8707cf8 (diff) | |
| download | coreboot-baa1e382178ab6a45c5d584a88ac26c0767f8a12.tar.xz | |
rambi: make ramids non-legacy gpio inputs
The romstage code for rambi uses the mmio way of reading
inputs. However, this is a problem is the GPIOs are set up
as legacy mode. Subsequent warm resets mean the ram_id is
read incorrectly. Ensure the ram_id is read consistently
by keeping the GPIOs for ram_id in mmio mode.
BUG=chrome-os-partner:24085
BRANCH=None
TEST=Built and booted. And rebooted. Now seeing consistent ram_id
values on warm resets.
Change-Id: Ieff98c000be80998854f325754f1e819975d2be5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/177230
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4977
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/rambi/gpio.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c index 7d44968648..dfe880a7af 100644 --- a/src/mainboard/google/rambi/gpio.c +++ b/src/mainboard/google/rambi/gpio.c @@ -200,9 +200,9 @@ static const struct soc_gpio_map gpssus_gpio_map[] = { GPIO_NC, /* S534 - NC */ GPIO_OUT_HIGH, /* S535 - LTE_DISABLE_L */ GPIO_NC, /* S536 - NC */ - GPIO_INPUT, /* S537 - RAM_ID0 */ - GPIO_INPUT, /* S538 - RAM_ID1 */ - GPIO_INPUT, /* S539 - RAM_ID2 */ + GPIO_FUNC0, /* S537 - RAM_ID0 */ + GPIO_FUNC0, /* S538 - RAM_ID1 */ + GPIO_FUNC0, /* S539 - RAM_ID2 */ GPIO_NC, /* S540 - NC */ GPIO_NC, /* S541 - NC */ GPIO_NC, /* S542 - NC */ |