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authorFurquan Shaikh <furquan@chromium.org>2017-11-08 11:28:10 -0800
committerAaron Durbin <adurbin@chromium.org>2017-11-09 19:02:03 +0000
commitd37107e130e2e36f9f058744e2ef7748b1b46d3b (patch)
treed369f33f91c99e66c3efd0309e5eb570567d8dcc /src/mainboard
parent2ecf3f8cb9784ce14752878a5a63c9359a7726a7 (diff)
downloadcoreboot-d37107e130e2e36f9f058744e2ef7748b1b46d3b.tar.xz
mb/google/{poppy,nautilus,soraka}: Disable deep S3
Poppy and variants won't be using deep S3. This change disables deep S3 option in devicetree. BUG=b:69053636 Change-Id: I5fb4a6a0e4216a3648b5ed888f6dc6618f1a9fc4 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22378 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb2
-rw-r--r--src/mainboard/google/poppy/variants/soraka/devicetree.cb2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 61b16e65f1..920ab5c15e 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -2,7 +2,7 @@ chip soc/intel/skylake
# Deep Sx states
register "deep_s3_enable_ac" = "0"
- register "deep_s3_enable_dc" = "1"
+ register "deep_s3_enable_dc" = "0"
register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 2721218659..efaea3fc57 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -2,7 +2,7 @@ chip soc/intel/skylake
# Deep Sx states
register "deep_s3_enable_ac" = "0"
- register "deep_s3_enable_dc" = "1"
+ register "deep_s3_enable_dc" = "0"
register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 1c342a4e43..14c2b060c6 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -2,7 +2,7 @@ chip soc/intel/skylake
# Deep Sx states
register "deep_s3_enable_ac" = "0"
- register "deep_s3_enable_dc" = "1"
+ register "deep_s3_enable_dc" = "0"
register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"