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authorTristan Corrick <tristan@corrick.kiwi>2018-10-31 02:25:54 +1300
committerNico Huber <nico.h@gmx.de>2018-11-01 22:22:12 +0000
commitf3127d4af71715bfa9e656b1187a3ba544ac8780 (patch)
tree84f0e9f572506053134126e73c5374ab61c5aee0 /src/mainboard
parent22f97009ad94f87ff4995513c3a9969a270aa769 (diff)
downloadcoreboot-f3127d4af71715bfa9e656b1187a3ba544ac8780.tar.xz
sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table
This patch is based on a8a9f34e9b7b ("sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables") Tested on an ASRock H81M-HDS. The generated _PRT object looks correct, and the system doesn't show any issue when running. The following assignments occur: ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:03.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:16.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=6 ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=1 ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=2 ACPI_PIRQ_GEN: PCI: 00:1c.3: pin=3 pirq=3 ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=7 ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=1 pirq=3 ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=2 pirq=2 Also tested on a Google Peppy board. The following assignments occur: ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:03.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=2 ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=6 ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0 ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=3 ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=6 ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=2 ACPI_PIRQ_GEN: PCI: 00:1f.6: pin=2 pirq=1 A diff of the _PRT object for the Google Peppy board is below. The code used in the diff has been modified for clarity, but the semantics remain the same. To summarise the diff: * The disabled PCIe root ports are no longer included. * The LPC controller is no longer included, as it has no interrupt pin. The pins for the remaining LPC devices are each one less. Perhaps the original _PRT object was incorrect? * The SDIO device is no longer included, as it is disabled. * The Serial IO devices are no longer included, but that is due to a separate issue I am having with this system (the devices don't show up under Linux regardless of this patch). In short: their omission is not a fault of this patch. --- pre/_PRT +++ post/_PRT @@ -1,301 +1,157 @@ Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { - Return (Package (0x12) + Return (Package (0x09) { Package (0x04) { 0x0002FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0003FFFF, Zero, Zero, 0x10 }, Package (0x04) { 0x0014FFFF, Zero, Zero, 0x12 }, Package (0x04) { 0x001BFFFF, Zero, Zero, 0x16 }, Package (0x04) { 0x001CFFFF, Zero, Zero, 0x10 }, - Package (0x04) - { - 0x001CFFFF, - One, - Zero, - 0x11 - }, - - Package (0x04) - { - 0x001CFFFF, - 0x02, - Zero, - 0x12 - }, - - Package (0x04) - { - 0x001CFFFF, - 0x03, - Zero, - 0x13 - }, - Package (0x04) { 0x001DFFFF, Zero, Zero, 0x13 }, Package (0x04) { 0x001FFFFF, Zero, Zero, 0x16 }, Package (0x04) { 0x001FFFFF, One, Zero, 0x12 }, Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x11 - }, - - Package (0x04) - { - 0x001FFFFF, - 0x03, - Zero, - 0x10 - }, - - Package (0x04) - { - 0x0015FFFF, - Zero, - Zero, - 0x14 - }, - - Package (0x04) - { - 0x0015FFFF, - One, - Zero, - 0x15 - }, - - Package (0x04) - { - 0x0015FFFF, - 0x02, - Zero, - 0x15 - }, - - Package (0x04) - { - 0x0015FFFF, - 0x03, - Zero, - 0x15 - }, - - Package (0x04) - { - 0x0017FFFF, - Zero, - Zero, - 0x17 } }) } Else { - Return (Package (0x12) + Return (Package (0x09) { Package (0x04) { 0x0002FFFF, Zero, ^LPCB.LNKA, Zero }, Package (0x04) { 0x0003FFFF, Zero, ^LPCB.LNKA, Zero }, Package (0x04) { 0x0014FFFF, Zero, ^LPCB.LNKC, Zero }, Package (0x04) { 0x001BFFFF, Zero, ^LPCB.LNKG, Zero }, Package (0x04) { 0x001CFFFF, Zero, ^LPCB.LNKA, Zero }, - Package (0x04) - { - 0x001CFFFF, - One, - ^LPCB.LNKB, - Zero - }, - - Package (0x04) - { - 0x001CFFFF, - 0x02, - ^LPCB.LNKC, - Zero - }, - - Package (0x04) - { - 0x001CFFFF, - 0x03, - ^LPCB.LNKD, - Zero - }, - Package (0x04) { 0x001DFFFF, Zero, ^LPCB.LNKD, Zero }, Package (0x04) { 0x001FFFFF, Zero, ^LPCB.LNKG, Zero }, Package (0x04) { 0x001FFFFF, One, ^LPCB.LNKC, Zero }, Package (0x04) { 0x001FFFFF, 0x02, ^LPCB.LNKB, Zero - }, - - Package (0x04) - { - 0x001FFFFF, - 0x03, - ^LPCB.LNKA, - Zero - }, - - Package (0x04) - { - 0x0015FFFF, - Zero, - ^LPCB.LNKE, - Zero - }, - - Package (0x04) - { - 0x0015FFFF, - One, - ^LPCB.LNKF, - Zero - }, - - Package (0x04) - { - 0x0015FFFF, - 0x02, - ^LPCB.LNKF, - Zero - }, - - Package (0x04) - { - 0x0015FFFF, - 0x03, - ^LPCB.LNKF, - Zero - }, - - Package (0x04) - { - 0x0017FFFF, - Zero, - ^LPCB.LNKH, - Zero } }) } } Change-Id: Id3f067cbf7c7d649fbbf774648d8ff928cb752a4 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl82
-rw-r--r--src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl82
-rw-r--r--src/mainboard/intel/baskingridge/acpi/haswell_pci_irqs.asl64
3 files changed, 0 insertions, 228 deletions
diff --git a/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl b/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index 0900a3df41..0000000000
--- a/src/mainboard/google/beltino/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for Haswell */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 16 },
- Package() { 0x001cffff, 1, 0, 17 },
- Package() { 0x001cffff, 2, 0, 18 },
- Package() { 0x001cffff, 3, 0, 19 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, 0, 19 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, 0, 18 },
- // LPC devices 0:1f.0
- Package() { 0x001fffff, 0, 0, 22 },
- Package() { 0x001fffff, 1, 0, 18 },
- Package() { 0x001fffff, 2, 0, 17 },
- Package() { 0x001fffff, 3, 0, 16 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, 0, 20 },
- Package() { 0x0015ffff, 1, 0, 21 },
- Package() { 0x0015ffff, 2, 0, 21 },
- Package() { 0x0015ffff, 3, 0, 21 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, 0, 23 },
- })
- } Else {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
- Package() { 0x0015ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 3, \_SB.PCI0.LPCB.LNKF, 0 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
- })
- }
-}
diff --git a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl b/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index 0900a3df41..0000000000
--- a/src/mainboard/google/slippy/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for Haswell */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 16 },
- Package() { 0x001cffff, 1, 0, 17 },
- Package() { 0x001cffff, 2, 0, 18 },
- Package() { 0x001cffff, 3, 0, 19 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, 0, 19 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, 0, 18 },
- // LPC devices 0:1f.0
- Package() { 0x001fffff, 0, 0, 22 },
- Package() { 0x001fffff, 1, 0, 18 },
- Package() { 0x001fffff, 2, 0, 17 },
- Package() { 0x001fffff, 3, 0, 16 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, 0, 20 },
- Package() { 0x0015ffff, 1, 0, 21 },
- Package() { 0x0015ffff, 2, 0, 21 },
- Package() { 0x0015ffff, 3, 0, 21 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, 0, 23 },
- })
- } Else {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // Mini-HD Audio 0:3.0
- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI 0:1d.0
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // XHCI 0:14.0
- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- // Serial IO 0:15.0
- Package() { 0x0015ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
- Package() { 0x0015ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x0015ffff, 3, \_SB.PCI0.LPCB.LNKF, 0 },
- // SDIO 0:17.0
- Package() { 0x0017ffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
- })
- }
-}
diff --git a/src/mainboard/intel/baskingridge/acpi/haswell_pci_irqs.asl b/src/mainboard/intel/baskingridge/acpi/haswell_pci_irqs.asl
deleted file mode 100644
index 3e841e03ab..0000000000
--- a/src/mainboard/intel/baskingridge/acpi/haswell_pci_irqs.asl
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This is board specific information: IRQ routing for IvyBridge */
-
-// PCI Interrupt Routing
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, 0, 16 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, 0, 22 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, 0, 17 },
- Package() { 0x001cffff, 1, 0, 18 },
- Package() { 0x001cffff, 2, 0, 19 },
- Package() { 0x001cffff, 3, 0, 20 },
- // EHCI #1 0:1d.0
- Package() { 0x001dffff, 0, 0, 19 },
- // EHCI #2 0:1a.0
- Package() { 0x001affff, 0, 0, 20 },
- // LPC devices 0:1f.0
- Package() { 0x001fffff, 0, 0, 21 },
- Package() { 0x001fffff, 1, 0, 22 },
- Package() { 0x001fffff, 2, 0, 23 },
- Package() { 0x001fffff, 3, 0, 16 },
- })
- } Else {
- Return (Package() {
- // Onboard graphics (IGD) 0:2.0
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- // High Definition Audio 0:1b.0
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
- // PCIe Root Ports 0:1c.x
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
- // EHCI #1 0:1d.0
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- // EHCI #2 0:1a.0
- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 },
- // LPC device 0:1f.0
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
- })
- }
-}