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| author | zbao <fishbaozi@gmail.com> | 2012-07-24 17:56:48 +0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-25 22:20:56 +0200 |
| commit | 19a185448a40461d0df53e907a80ed1814695e5e (patch) | |
| tree | ac93ded310202e4ab1bb6daa19dcda37a6a51282 /src/mainboard | |
| parent | 405cfe219a77895692aa50a1e8416c2607402c39 (diff) | |
| download | coreboot-19a185448a40461d0df53e907a80ed1814695e5e.tar.xz | |
AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800
Remove the warning message from linux dmesg,
mtrr: your BIOS has configured as incorrect mask, fixing it.
Change-Id: I355509db12ab10c33b7c1c23e2c7c4783f30e67e
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1349
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/amd/dinar/agesawrapper.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/parmer/agesawrapper.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/torpedo/agesawrapper.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/dinar/agesawrapper.c b/src/mainboard/amd/dinar/agesawrapper.c index 171deb8cee..a8ec91710b 100644 --- a/src/mainboard/amd/dinar/agesawrapper.c +++ b/src/mainboard/amd/dinar/agesawrapper.c @@ -270,7 +270,7 @@ agesawrapper_amdinitmmio ( /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000 - CONFIG_ROM_SIZE) | 5; LibAmdMsrWrite (0x20E, &MsrReg, &StdHeader); - MsrReg = (0x1000000000 - CONFIG_ROM_SIZE) | 0x800; + MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800; LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c index ff36750fd8..3229161a6d 100644 --- a/src/mainboard/amd/parmer/agesawrapper.c +++ b/src/mainboard/amd/parmer/agesawrapper.c @@ -166,7 +166,7 @@ agesawrapper_amdinitmmio ( /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull; LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); - MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull; + MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull; LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; diff --git a/src/mainboard/amd/torpedo/agesawrapper.c b/src/mainboard/amd/torpedo/agesawrapper.c index 2995856ec4..2bd172560e 100644 --- a/src/mainboard/amd/torpedo/agesawrapper.c +++ b/src/mainboard/amd/torpedo/agesawrapper.c @@ -281,7 +281,7 @@ agesawrapper_amdinitmmio ( /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CONFIG_ROM_SIZE) | 5ull; LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); - MsrReg = (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800ull; + MsrReg = (0x1000000000000ull - CONFIG_ROM_SIZE) | 0x800ull; LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); /* Clear all pending SMI. On S3 clear power button enable so it wll not generate an SMI */ |