drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more

appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from
some mainboards.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

13 files changed, 15 insertions, 152 deletions

diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index f6c862443a..5198a638b3 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -52,12 +52,6 @@
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-
-/* FIXME: Use console.c post_code function */
-static void post_code(u8 value) {
-	outb(value, 0x80);
-}
-
 #include "arch/i386/lib/console.c"
 #include "pc80/serial.c"
 #include "lib/ramtest.c"
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 8244746c1e..fa65000b89 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -52,12 +52,6 @@
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-
-/* FIXME: Use console.c post_code function */
-static void post_code(u8 value) {
-	outb(value, 0x80);
-}
-
 #include "arch/i386/lib/console.c"
 #include "pc80/serial.c"
 #include "lib/ramtest.c"
diff --git a/src/mainboard/dell/s1850/reset.c b/src/mainboard/dell/s1850/reset.c
index d00e6181a9..745f187cae 100644
--- a/src/mainboard/dell/s1850/reset.c
+++ b/src/mainboard/dell/s1850/reset.c
@@ -1,18 +1,6 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/pci.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#else
+#if defined (__PRE_RAM__)
 #include <arch/romcc_io.h>
 #endif
 
@@ -20,6 +8,7 @@ void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c
index 1388bcf6b4..006c746dbb 100644
--- a/src/mainboard/intel/eagleheights/reset.c
+++ b/src/mainboard/intel/eagleheights/reset.c
@@ -21,20 +21,8 @@
 
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
+#if defined (__PRE_RAM__)
+#include <arch/romcc_io.h>
 #endif
 
 void soft_reset(void)
diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c
index 3b79e439e2..fb379bd372 100644
--- a/src/mainboard/intel/jarrell/reset.c
+++ b/src/mainboard/intel/jarrell/reset.c
@@ -1,42 +1,25 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
+#include <arch/romcc_io.h>
 
 void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
         outb(0x06, 0xcf9);
 }
+
 void full_reset(void)
 {
-	device_t dev;
 	/* Enable power on after power fail... */
-	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
-	if (dev != PCI_DEV_INVALID) {
-		unsigned byte;
-		byte = pci_read_config8(dev, 0xa4);
-		byte &= 0xfe;
-		pci_write_config8(dev, 0xa4, byte);
-		
-	}
+	unsigned byte;
+	byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
+	byte &= 0xfe;
+	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte);
         outb(0x0e, 0xcf9);
 }
 
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 114e3c6fbe..51c29d4e04 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -49,11 +49,6 @@
 
 // for enable the FAN
 #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
-
-static void post_code(u8 value) {
-	outb(value, 0x80);
-}
-
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "lib/ramtest.c"
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 8c56a49906..7014713601 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -50,10 +50,6 @@
 // for enable the FAN
 #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
 
-static void post_code(u8 value) {
-	outb(value, 0x80);
-}
-
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "lib/ramtest.c"
diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c
index 1ac210e2d2..2f21605e7c 100644
--- a/src/mainboard/supermicro/x6dai_g/reset.c
+++ b/src/mainboard/supermicro/x6dai_g/reset.c
@@ -1,20 +1,5 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
 
 void soft_reset(void)
 {
diff --git a/src/mainboard/supermicro/x6dhe_g/reset.c b/src/mainboard/supermicro/x6dhe_g/reset.c
index 1ac210e2d2..1b1bc68d4b 100644
--- a/src/mainboard/supermicro/x6dhe_g/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g/reset.c
@@ -1,25 +1,11 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
 
 void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
diff --git a/src/mainboard/supermicro/x6dhe_g2/reset.c b/src/mainboard/supermicro/x6dhe_g2/reset.c
index 1ac210e2d2..1b1bc68d4b 100644
--- a/src/mainboard/supermicro/x6dhe_g2/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g2/reset.c
@@ -1,25 +1,11 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
 
 void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
diff --git a/src/mainboard/supermicro/x6dhr_ig/reset.c b/src/mainboard/supermicro/x6dhr_ig/reset.c
index 1ac210e2d2..1b1bc68d4b 100644
--- a/src/mainboard/supermicro/x6dhr_ig/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig/reset.c
@@ -1,25 +1,11 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
 
 void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
diff --git a/src/mainboard/supermicro/x6dhr_ig2/reset.c b/src/mainboard/supermicro/x6dhr_ig2/reset.c
index 1ac210e2d2..1b1bc68d4b 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/reset.c
@@ -1,25 +1,11 @@
 #include <arch/io.h>
 #include <reset.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
-	((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-#define PCI_DEV_INVALID 0
-
-static inline device_t pci_locate_device(unsigned pci_id, device_t from)
-{
-	return dev_find_device(pci_id >> 16, pci_id & 0xffff, from);
-}
-#endif
 
 void soft_reset(void)
 {
         outb(0x04, 0xcf9);
 }
+
 void hard_reset(void)
 {
         outb(0x02, 0xcf9);
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index e75ef0780c..bdcb9fd0cd 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -48,11 +48,6 @@
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-
-static void post_code(u8 value) {
-	outb(value, 0x80);
-}
-
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #if CONFIG_USBDEBUG_DIRECT