diff options
| author | Gabe Black <gabeblack@google.com> | 2014-03-21 21:32:12 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-09 20:32:06 +0100 |
| commit | 967058f807418dc964ca04849b59c3b2a03dbee5 (patch) | |
| tree | db501e751f3d6d75e17f796c07ec39ba9d094995 /src/mainboard | |
| parent | 30974bc2f5f4764425e69256782cca03b290c4f4 (diff) | |
| download | coreboot-967058f807418dc964ca04849b59c3b2a03dbee5.tar.xz | |
spi: Factor EC protocol details out of the SPI drivers.
The SPI drivers for tegra and exynos5420 have code in them which waits for a
frame header and leaves filler data out. The SPI driver shouldn't have support
for frame headers directly. If a device uses them, it should support them
itself. That makes the SPI drivers simpler and easier to write.
When moving the frame handling logic into the EC support code, EC communication
continued to work on tegra but no longer worked on exynos5420. That suggested
the SPI driver on the 5420 wasn't working correctly, so I replaced that with
the implementation in depthcharge. Unfortunately that implementation doesn't
support waiting for a frame header for the EC, so these changes are combined
into one.
BUG=None
TEST=Built and booted on pit. Built and booted on nyan. In both cases,
verified that there were no error messages from the SPI drivers or the EC
code.
BRANCH=None
Original-Change-Id: I62a68820c632f154acece94f54276ddcd1442c09
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/191192
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 4fcfed280ad70f14a013d5353aa0bee0af540630)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Id8824523abc7afcbc214845901628833e135d142
Reviewed-on: http://review.coreboot.org/7706
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/nyan/mainboard.c | 8 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_big/mainboard.c | 8 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_blaze/mainboard.c | 8 |
3 files changed, 3 insertions, 21 deletions
diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index a96236bcfa..ec06a7acfe 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -188,13 +188,7 @@ static void setup_kernel_info(void) static void setup_ec_spi(void) { - struct tegra_spi_channel *spi; - - spi = tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); - - /* Set frame header for use by CrOS EC */ - spi->frame_header = 0xec; - spi->rx_frame_header_enable = 1; + tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); } static void mainboard_init(device_t dev) diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c index 75ff0e7132..242f995d98 100644 --- a/src/mainboard/google/nyan_big/mainboard.c +++ b/src/mainboard/google/nyan_big/mainboard.c @@ -188,13 +188,7 @@ static void setup_kernel_info(void) static void setup_ec_spi(void) { - struct tegra_spi_channel *spi; - - spi = tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); - - /* Set frame header for use by CrOS EC */ - spi->frame_header = 0xec; - spi->rx_frame_header_enable = 1; + tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); } static void mainboard_init(device_t dev) diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c index 2f385bcbc4..b2787ec4c5 100644 --- a/src/mainboard/google/nyan_blaze/mainboard.c +++ b/src/mainboard/google/nyan_blaze/mainboard.c @@ -188,13 +188,7 @@ static void setup_kernel_info(void) static void setup_ec_spi(void) { - struct tegra_spi_channel *spi; - - spi = tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); - - /* Set frame header for use by CrOS EC */ - spi->frame_header = 0xec; - spi->rx_frame_header_enable = 1; + tegra_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS); } static void mainboard_init(device_t dev) |