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author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-02-19 22:07:12 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-03-03 20:55:26 +0100 |
commit | 9817a37416468cc8a00990e3f431b8d3634f5fcc (patch) | |
tree | 46ef52e3a67094ef02755955a579278cd931f4a7 /src/mainboard | |
parent | 7d1996cc4af563f614455db23fe91a6feccd2560 (diff) | |
download | coreboot-9817a37416468cc8a00990e3f431b8d3634f5fcc.tar.xz |
nehalem/raminit: Don't touch clock generator in raminit.
Clock generator is mobo-specific. Don't touch it in raminit.
Change-Id: Ie114696b7fb13b8daee8dd1393d43bc609e149b3
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5265
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/x201/romstage.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 07687b8448..1237a5cb7a 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -203,6 +203,17 @@ static inline u16 read_acpi16(u32 addr) return inw(DEFAULT_PMBASE | addr); } +static void set_fsb_frequency(void) +{ + u8 block[5]; + u16 fsbfreq = 62879; + smbus_block_read(0x69, 0, 5, block); + block[0] = fsbfreq; + block[1] = fsbfreq >> 8; + + smbus_block_write(0x69, 0, 5, block); +} + void main(unsigned long bist) { u32 reg32; @@ -287,6 +298,10 @@ void main(unsigned long bist) timestamp_add_now(TS_BEFORE_INITRAM); + chipset_init(s3resume); + + set_fsb_frequency(); + raminit(s3resume, spd_addrmap); timestamp_add_now(TS_AFTER_INITRAM); |