diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2008-02-18 20:40:02 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2008-02-18 20:40:02 +0000 |
| commit | bcd28f22f473f5ccced4bfc27f3964eeaac6013a (patch) | |
| tree | 9effabce1756b460aa78c425f8533dd600fb03e0 /src/mainboard | |
| parent | 8dcab7816469c6ba2a78f6cd66a1c254e8421f3b (diff) | |
| download | coreboot-bcd28f22f473f5ccced4bfc27f3964eeaac6013a.tar.xz | |
Attached patch fixes two typos in the sio_setup routine (comment + wrong exitLDN
device) and sets the chipset voltage from 1.6V to 1.5V.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c index 5f0b2d3fbf..ca0fbd9197 100644 --- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c +++ b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c @@ -182,16 +182,15 @@ void sio_init(void) { pnp_enter_ext_func_mode(GPIO_DEV); pnp_set_logical_device(GPIO_DEV); - pnp_exit_ext_func_mode(GPIO_DEV); - + /* set memory voltage to 2.75V, vcore offset + 100mV, 1.5V Chipset voltage */ - pnp_write_config(GPIO_DEV, 0xe0, 0xde); /* 1101110 0=output 1=input */ - pnp_write_config(GPIO_DEV, 0xe1, 0x1); /* set output val */ + pnp_write_config(GPIO_DEV, 0x30, 0x9); /* Enable GPIO 2 & GPIO 5 */ pnp_write_config(GPIO_DEV, 0xe2, 0x0); /* no inversion */ - pnp_write_config(GPIO_DEV, 0xe3, 0x3); /* 0000 0011 0=output 1=input */ - pnp_write_config(GPIO_DEV, 0xe4, 0xa4); /* set output val 1010 0100 */ pnp_write_config(GPIO_DEV, 0xe5, 0x0); /* no inversion */ - pnp_write_config(GPIO_DEV, 0x30, 0x9); /* Enable GPIO 2 & GPIO 5 */ + pnp_write_config(GPIO_DEV, 0xe3, 0x3); /* 0000 0011 0=output 1=input */ + pnp_write_config(GPIO_DEV, 0xe0, 0xde); /* 1101110 0=output 1=input */ + pnp_write_config(GPIO_DEV, 0xe1, 0x1); /* set output val */ + pnp_write_config(GPIO_DEV, 0xe4, 0xb4); /* set output val 1011 0100 */ pnp_exit_ext_func_mode(GPIO_DEV); } |