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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-20 20:12:32 +0300 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-20 16:07:02 +0000 |
commit | 113f670baabab0776e68c877fe6b3d7dd07e79a9 (patch) | |
tree | 021969c4e70f06480911359ec5ec66f5a43bb15f /src/northbridge/amd/agesa/family12/northbridge.c | |
parent | 71955a5b3fff71ee56600fb4345f343187faf24b (diff) | |
download | coreboot-113f670baabab0776e68c877fe6b3d7dd07e79a9.tar.xz |
AGESA binaryPI: Fix and optimize for MAX_NODES_NUM
With nodeid<8, CONFIG_CDB==0x18, PCI device number does
not overflow. CONFIG_CDB is not a value we can configure.
Change-Id: I23e9707a8ec12dcd80c00688d6237d085d1abf36
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26437
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family12/northbridge.c')
-rw-r--r-- | src/northbridge/amd/agesa/family12/northbridge.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 80254e0df1..dbe88d59bc 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -46,11 +46,7 @@ static unsigned fx_devs = 0; static struct device *get_node_pci(u32 nodeid, u32 fn) { - if ((CONFIG_CDB + nodeid) < 32) { - return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); - } else { - return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn)); - } + return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn)); } static void get_fx_devs(void) |