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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-07-19 19:26:43 +0300
committerAnton Kochkov <anton.kochkov@gmail.com>2012-08-02 12:56:09 +0200
commit6b5eb1cc2d1702ff10cd02249d3d861c094f9118 (patch)
treebff0974dc6c3b5637c1fd2be45d06d4cf5dc9fba /src/northbridge/amd/agesa
parent30f04645c1dc25a34d1e274a360a8a97f1d07f92 (diff)
downloadcoreboot-6b5eb1cc2d1702ff10cd02249d3d861c094f9118.tar.xz
AMD and GFXUMA: move setup_uma_memory() to northbridge
UMA region can be determined at any time after the amount of RAM is known and before the uma_resource() call. Change-Id: I2a0bf2d3cad55ee70e889c88846f962b7faa0c7e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1379 Reviewed-by: Zheng Bao <zheng.bao@amd.com> Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c4
4 files changed, 12 insertions, 4 deletions
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 7ac8996f40..f3f03a42b6 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -469,7 +469,7 @@ static void set_resources(device_t dev)
printk(BIOS_DEBUG, "Fam12h - northbridge.c - set_resources - End.\n");
}
-void setup_uma_memory(void)
+static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@@ -611,6 +611,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
+ setup_uma_memory();
+
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 6cdff271f6..af6dfcc297 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -517,7 +517,7 @@ static void domain_read_resources(device_t dev)
#endif
}
-void setup_uma_memory(void)
+static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@@ -574,6 +574,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
+ setup_uma_memory();
+
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index be86fda58a..a080293503 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -629,7 +629,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
#define ONE_MB 0x100000
-void setup_uma_memory(void)
+static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@@ -686,6 +686,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
+ setup_uma_memory();
+
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index b572e24f77..9a31751b1d 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -638,7 +638,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
#define ONE_MB_SHIFT 20
-void setup_uma_memory(void)
+static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@@ -696,6 +696,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
+ setup_uma_memory();
+
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {