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authorAntonello Dettori <dev@dettori.io>2016-11-08 18:44:46 +0100
committerMartin Roth <martinroth@google.com>2016-11-15 18:19:30 +0100
commit17f3c0f6a2b70c1bfbdd6997dd4f29257f66534c (patch)
treeb5b14f2a95077927d18e07e43e10cfe35dc58662 /src/northbridge/amd/agesa
parent50f1b1aab5e25655f008a90b56069451130c18e9 (diff)
downloadcoreboot-17f3c0f6a2b70c1bfbdd6997dd4f29257f66534c.tar.xz
northbridge/amd/agesa/family10: transition away from device_t
Replace the use of the old device_t definition inside northbridge/amd/agesa/family10. Change-Id: I5723e217fc739ab576cbe3a1ee6d92023190267c Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/17313 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family10/reset_test.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa/family10/reset_test.h b/src/northbridge/amd/agesa/family10/reset_test.h
index 88d389cd7c..cb67de1438 100644
--- a/src/northbridge/amd/agesa/family10/reset_test.h
+++ b/src/northbridge/amd/agesa/family10/reset_test.h
@@ -29,7 +29,7 @@
static inline u32 warm_reset_detect(u8 nodeid)
{
u32 htic;
- device_t device;
+ pci_devfn_t device;
device = NODE_PCI(nodeid, 0);
htic = pci_io_read_config32(device, HT_INIT_CONTROL);
return (htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect);
@@ -38,7 +38,7 @@ static inline u32 warm_reset_detect(u8 nodeid)
static inline void distinguish_cpu_resets(u8 nodeid)
{
u32 htic;
- device_t device;
+ pci_devfn_t device;
device = NODE_PCI(nodeid, 0);
htic = pci_io_read_config32(device, HT_INIT_CONTROL);
htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect;