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authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/northbridge/amd/agesa
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
downloadcoreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family16kb/state_machine.c2
-rw-r--r--src/northbridge/amd/agesa/state_machine.h16
6 files changed, 15 insertions, 15 deletions
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 29f42745ce..c31cb70bb0 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -424,7 +424,7 @@ static void set_resource(struct device *dev, struct resource *resource,
}
-#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
+#if CONFIG(CONSOLE_VGA_MULTI)
extern struct device *vga_pri; // the primary vga device, defined in device.c
#endif
@@ -438,7 +438,7 @@ printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
+#if CONFIG(CONSOLE_VGA_MULTI)
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
/* We need to make sure the vga_pri is under the link */
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 9da4e8ee59..381d19843e 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -410,7 +410,7 @@ static void set_resource(struct device *dev, struct resource *resource,
report_resource_stored(dev, resource, buf);
}
-#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
+#if CONFIG(CONSOLE_VGA_MULTI)
extern struct device *vga_pri; // the primary vga device, defined in device.c
#endif
@@ -424,7 +424,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
+#if CONFIG(CONSOLE_VGA_MULTI)
printk(BIOS_DEBUG,
"VGA: vga_pri bus num = %d bus range [%d,%d]\n",
vga_pri->bus->secondary, link->secondary,
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 7a75997963..367fecafa5 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -367,7 +367,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
+#if CONFIG(MULTIPLE_VGA_ADAPTERS)
extern struct device *vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index ddfab82e78..44f49ea094 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -366,7 +366,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
+#if CONFIG(MULTIPLE_VGA_ADAPTERS)
extern struct device *vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
diff --git a/src/northbridge/amd/agesa/family16kb/state_machine.c b/src/northbridge/amd/agesa/family16kb/state_machine.c
index 9840c1c73c..fea097f6c6 100644
--- a/src/northbridge/amd/agesa/family16kb/state_machine.c
+++ b/src/northbridge/amd/agesa/family16kb/state_machine.c
@@ -32,7 +32,7 @@ void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post)
{
AGESA_STATUS status;
- if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) {
+ if (CONFIG(ENABLE_MRC_CACHE)) {
status = OemInitResume(&Post->MemConfig.MemContext);
if (status == AGESA_SUCCESS)
Post->MemConfig.MemRestoreCtl = 1;
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h
index 43b205a14d..93625fce12 100644
--- a/src/northbridge/amd/agesa/state_machine.h
+++ b/src/northbridge/amd/agesa/state_machine.h
@@ -20,7 +20,7 @@
#include <AGESA.h>
#include <AMD.h>
-#define HAS_LEGACY_WRAPPER IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER)
+#define HAS_LEGACY_WRAPPER CONFIG(BINARYPI_LEGACY_WRAPPER)
/* eventlog */
const char *agesa_struct_name(int state);
@@ -30,7 +30,7 @@ AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus);
/* For suspend-to-ram support. */
-#if !IS_ENABLED(CONFIG_CPU_AMD_PI)
+#if !CONFIG(CPU_AMD_PI)
/* TODO: With binaryPI we need different interface. */
AGESA_STATUS OemInitResume(AMD_S3_PARAMS *dataBlock);
AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock);
@@ -89,18 +89,18 @@ void platform_AfterInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume);
void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late);
void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late);
-#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01)
+#if CONFIG(CPU_AMD_PI_00660F01)
typedef void AMD_S3SAVE_PARAMS;
#endif
void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save);
/* FCH callouts, not used with CIMx. */
#define HAS_AGESA_FCH_OEM_CALLOUT \
- IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) || \
- IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) || \
- IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_AVALON) || \
- IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON) || \
- IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_KERN)
+ CONFIG(SOUTHBRIDGE_AMD_AGESA_HUDSON) || \
+ CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) || \
+ CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) || \
+ CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON) || \
+ CONFIG(SOUTHBRIDGE_AMD_PI_KERN)
#if HAS_AGESA_FCH_OEM_CALLOUT
/* FIXME: Structures included here were supposed to be private to AGESA. */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 12:37:11 +0000