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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-20 20:12:32 +0300
committerPatrick Georgi <pgeorgi@google.com>2018-07-20 16:07:02 +0000
commit113f670baabab0776e68c877fe6b3d7dd07e79a9 (patch)
tree021969c4e70f06480911359ec5ec66f5a43bb15f /src/northbridge/amd/agesa
parent71955a5b3fff71ee56600fb4345f343187faf24b (diff)
downloadcoreboot-113f670baabab0776e68c877fe6b3d7dd07e79a9.tar.xz
AGESA binaryPI: Fix and optimize for MAX_NODES_NUM
With nodeid<8, CONFIG_CDB==0x18, PCI device number does not overflow. CONFIG_CDB is not a value we can configure. Change-Id: I23e9707a8ec12dcd80c00688d6237d085d1abf36 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c21
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c21
4 files changed, 4 insertions, 50 deletions
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 80254e0df1..dbe88d59bc 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -46,11 +46,7 @@ static unsigned fx_devs = 0;
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
- if ((CONFIG_CDB + nodeid) < 32) {
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
- } else {
- return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
- }
+ return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
}
static void get_fx_devs(void)
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index d26695cd5d..ea21c6952a 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -46,11 +46,7 @@ static unsigned fx_devs = 0;
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
- if ((CONFIG_CDB + nodeid) < 32) {
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
- } else {
- return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
- }
+ return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
}
static void get_fx_devs(void)
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 21badfe622..c06e53cffe 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -40,7 +40,7 @@
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
+#define MAX_NODE_NUMS MAX_NODES
typedef struct dram_base_mask {
u32 base; //[47:27] at [28:8]
@@ -102,15 +102,7 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
-#if MAX_NODE_NUMS + CONFIG_CDB >= 32
- if ((CONFIG_CDB + nodeid) < 32) {
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
- } else {
- return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
- }
-#else
return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
-#endif
}
static void get_fx_devs(void)
@@ -153,18 +145,7 @@ static void f1_write_config32(unsigned reg, u32 value)
static u32 amdfam15_nodeid(struct device *dev)
{
-#if MAX_NODE_NUMS == 64
- unsigned busn;
- busn = dev->bus->secondary;
- if (busn != CONFIG_CBB) {
- return (dev->path.pci.devfn >> 3) - CONFIG_CDB + 32;
- } else {
- return (dev->path.pci.devfn >> 3) - CONFIG_CDB;
- }
-
-#else
return (dev->path.pci.devfn >> 3) - CONFIG_CDB;
-#endif
}
static void set_vga_enable_reg(u32 nodeid, u32 linkn)
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 760d1a1680..0a60e4ecdc 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -39,7 +39,7 @@
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
+#define MAX_NODE_NUMS MAX_NODES
typedef struct dram_base_mask {
u32 base; //[47:27] at [28:8]
@@ -101,15 +101,7 @@ static void set_mmio_addr_reg(u32 nodeid, u32 linkn, u32 reg, u32 index, u32 mmi
static struct device *get_node_pci(u32 nodeid, u32 fn)
{
-#if MAX_NODE_NUMS + CONFIG_CDB >= 32
- if ((CONFIG_CDB + nodeid) < 32) {
- return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
- } else {
- return dev_find_slot(CONFIG_CBB-1, PCI_DEVFN(CONFIG_CDB + nodeid - 32, fn));
- }
-#else
return dev_find_slot(CONFIG_CBB, PCI_DEVFN(CONFIG_CDB + nodeid, fn));
-#endif
}
static void get_fx_devs(void)
@@ -152,18 +144,7 @@ static void f1_write_config32(unsigned reg, u32 value)
static u32 amdfam16_nodeid(struct device *dev)
{
-#if MAX_NODE_NUMS == 64
- unsigned busn;
- busn = dev->bus->secondary;
- if (busn != CONFIG_CBB) {
- return (dev->path.pci.devfn >> 3) - CONFIG_CDB + 32;
- } else {
- return (dev->path.pci.devfn >> 3) - CONFIG_CDB;
- }
-
-#else
return (dev->path.pci.devfn >> 3) - CONFIG_CDB;
-#endif
}
static void set_vga_enable_reg(u32 nodeid, u32 linkn)