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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-24 16:23:57 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-26 09:26:09 +0000
commitd41feed800ca094ec8ac5f793b7ec2f345859b1c (patch)
tree9500a33e4875c29bfc8df873b77ad2b075bea023 /src/northbridge/amd/agesa
parentd229d4a28e6f398563a4f43035a63d5344ca7f4e (diff)
downloadcoreboot-d41feed800ca094ec8ac5f793b7ec2f345859b1c.tar.xz
AGESA: Avoid cpuRegisters.h include
Change-Id: I077677c10508a89a79bcb580249c1310e319aaf1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21664 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c3
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c3
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c3
3 files changed, 3 insertions, 6 deletions
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 4dbe86d3d9..735e126bb9 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -35,7 +35,6 @@
#include <AGESA.h>
#include <Options.h>
#include <Topology.h>
-#include <cpuRegisters.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
@@ -931,7 +930,7 @@ static void cpu_bus_scan(device_t dev)
#endif
/* Get Max Number of cores(MNC) */
- coreid_bits = (cpuid_ecx(AMD_CPUID_ASIZE_PCCOUNT) & 0x0000F000) >> 12;
+ coreid_bits = (cpuid_ecx(0x80000008) & 0x0000F000) >> 12;
core_max = 1 << (coreid_bits & 0x000F); //mnc
ApicIdCoreIdSize = ((cpuid_ecx(0x80000008)>>12) & 0xF);
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index e82dae17d9..675be14182 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -36,7 +36,6 @@
#include <Porting.h>
#include <Options.h>
#include <Topology.h>
-#include <cpuRegisters.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
@@ -921,7 +920,7 @@ static void cpu_bus_scan(device_t dev)
#endif
/* Get Max Number of cores(MNC) */
- coreid_bits = (cpuid_ecx(AMD_CPUID_ASIZE_PCCOUNT) & 0x0000F000) >> 12;
+ coreid_bits = (cpuid_ecx(0x80000008) & 0x0000F000) >> 12;
core_max = 1 << (coreid_bits & 0x000F); //mnc
ApicIdCoreIdSize = ((cpuid_ecx(0x80000008)>>12) & 0xF);
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 77215b4ae6..557c9c4bbd 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -35,7 +35,6 @@
#include <AGESA.h>
#include <Options.h>
#include <Topology.h>
-#include <cpuRegisters.h>
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
@@ -937,7 +936,7 @@ static void cpu_bus_scan(device_t dev)
#endif
/* Get Max Number of cores(MNC) */
- coreid_bits = (cpuid_ecx(AMD_CPUID_ASIZE_PCCOUNT) & 0x0000F000) >> 12;
+ coreid_bits = (cpuid_ecx(0x80000008) & 0x0000F000) >> 12;
core_max = 1 << (coreid_bits & 0x000F); //mnc
ApicIdCoreIdSize = ((cpuid_ecx(0x80000008)>>12) & 0xF);