summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/agesa
diff options
context:
space:
mode:
authorMartin Roth <martin.roth@se-eng.com>2013-02-10 14:53:35 -0700
committerMartin Roth <martin.roth@se-eng.com>2013-02-18 05:01:53 +0100
commit92f03c0a063e842febf616641a0a9ff967dd2013 (patch)
treec18a7c462a326bfaa0c92413d1049de14b6783ce /src/northbridge/amd/agesa
parent96508a794969f35f10e8a346c227dfa7a026e9ea (diff)
downloadcoreboot-92f03c0a063e842febf616641a0a9ff967dd2013.tar.xz
AMD Family12h: Fix warnings
Add needed prototypes to .h files. Remove unused variables and fix types in printk statements. Add #IFNDEFs around #DEFINEs to keep them from being defined twice. Fix a whole bunch of casts. Fix undefined pre-increment behaviour in a couple of macros. These now match the macros in the F14 tree. Change a value of 0xFF that was getting truncated when being assigned to a 4-bit bitfield to a value of 0x0f. This was tested with the torpedo build. This fixes roughly 132 of the 561 warnings in the coreboot build so I'm not going to list them all. Here is a sample of the warnings fixed: In file included from src/cpu/amd/agesa/family12/model_12_init.c:35:0: src/include/cpu/amd/amdfam12.h:52:5: warning: redundant redeclaration of 'get_initial_apicid' [-Wredundant-decls] In file included from src/cpu/amd/agesa/family12/model_12_init.c:34:0: src/include/cpu/amd/multicore.h:48:5: note: previous declaration of 'get_initial_apicid' was here src/northbridge/amd/agesa/family12/northbridge.c:50:10: warning: no previous prototype for 'get_node_pci' [-Wmissing-prototypes] src/northbridge/amd/agesa/family12/northbridge.c: In function 'get_hw_mem_hole_info': src/northbridge/amd/agesa/family12/northbridge.c:302:13: warning: unused variable 'i' [-Wunused-variable] src/northbridge/amd/agesa/family12/northbridge.c: In function 'domain_set_resources': src/northbridge/amd/agesa/family12/northbridge.c:587:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'device_t' [-Wformat] src/northbridge/amd/agesa/family12/northbridge.c:587:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'device_t' [-Wformat] src/northbridge/amd/agesa/family12/northbridge.c:716:1: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'long unsigned int' [-Wformat] In file included from src/mainboard/amd/torpedo/agesawrapper.h:31:0, from src/northbridge/amd/agesa/family12/northbridge.c:38: src/vendorcode/amd/agesa/f12/AGESA.h:1282:0: warning: "TOP_MEM" redefined [enabled by default] In file included from src/northbridge/amd/agesa/family12/northbridge.c:34:0: src/include/cpu/amd/mtrr.h:31:0: note: this is the location of the previous definition In file included from src/mainboard/amd/torpedo/agesawrapper.h:31:0, from src/northbridge/amd/agesa/family12/northbridge.c:38: src/vendorcode/amd/agesa/f12/AGESA.h:1283:0: warning: "TOP_MEM2" redefined [enabled by default] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetNumberOfComplexes': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:99:19: warning: operation on 'ComplexList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetLengthOfPcieEnginesList': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:126:20: warning: operation on 'PciePortList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetLengthOfDdiEnginesList': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:153:19: warning: operation on 'DdiLinkList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c: In function 'PcieInputParserGetComplexDescriptorOfSocket': src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c:225:17: warning: operation on 'ComplexList' may be undefined [-Wsequence-point] src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c:246:1: warning: no previous prototype for 'PcieFmForceDccRecalibrationCallback' [-Wmissing-prototypes] In file included from src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c:58:0: src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h:120:5: warning: large integer implicitly truncated to unsigned type [-Woverflow] And fixed a boatload of these types of warning: src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c: In function 'HeapGetBaseAddress': src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:687:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:694:19: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:701:23: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:702:23: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:705:23: warning: assignment makes integer from pointer without a cast [enabled by default] src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c:709:21: warning: assignment makes integer from pointer without a cast [enabled by default] Change-Id: I97fa0b8edb453eb582e4402c66482ae9f0a8f764 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/2348 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c19
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.h2
2 files changed, 11 insertions, 10 deletions
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index a4ed87f891..1467fdcfd2 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -299,7 +299,6 @@ struct hw_mem_hole_info {
static struct hw_mem_hole_info get_hw_mem_hole_info(void)
{
struct hw_mem_hole_info mem_hole;
- int i;
mem_hole.hole_startk = CONFIG_HW_MEM_HOLE_SIZEK;
mem_hole.node_id = -1;
@@ -582,10 +581,8 @@ static void domain_read_resources(device_t dev)
static void domain_set_resources(device_t dev)
{
- u32 val;
printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
- printk(BIOS_DEBUG, " amsr - incoming dev = %08lx\n",dev);
-
+ printk(BIOS_DEBUG, " amsr - incoming dev = %08x\n", (u32) dev);
#if CONFIG_PCI_64BIT_PREF_MEM
struct resource *io, *mem1, *mem2;
@@ -593,7 +590,7 @@ static void domain_set_resources(device_t dev)
#endif
unsigned long mmio_basek;
u32 pci_tolm;
- int i, idx;
+ int idx;
struct bus *link;
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
struct hw_mem_hole_info mem_hole;
@@ -712,8 +709,9 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
sizek = limitk - 768;
}
-
-printk(BIOS_DEBUG, "adsr: mmio_basek=%08x, basek=%08x, limitk=%08x\n", mmio_basek, basek, limitk);
+ printk(BIOS_DEBUG,
+ "adsr: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
+ mmio_basek, basek, limitk);
/* split the region to accomodate pci memory space */
if ( (basek < 4*1024*1024 ) && (limitk > mmio_basek) ) {
@@ -760,7 +758,7 @@ printk(BIOS_DEBUG, "adsr: mmio_basek=%08x, basek=%08x, limitk=%08x\n", mmio_bas
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
- printk(BIOS_DEBUG, " adsr - uma_memory_base = %x.\n",uma_memory_base);
+ printk(BIOS_DEBUG, " adsr - uma_memory_base = %llx.\n", uma_memory_base);
#else
high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
@@ -768,8 +766,9 @@ printk(BIOS_DEBUG, "adsr: mmio_basek=%08x, basek=%08x, limitk=%08x\n", mmio_bas
}
#endif
}
-printk(BIOS_DEBUG, " adsr - mmio_basek = %x.\n",mmio_basek);
-printk(BIOS_DEBUG, " adsr - high_tables_size = %x.\n",high_tables_size);
+ printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek);
+ printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n",
+ high_tables_size);
#if CONFIG_GFXUMA
uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
diff --git a/src/northbridge/amd/agesa/family12/northbridge.h b/src/northbridge/amd/agesa/family12/northbridge.h
index 8de80ff501..d5c12f25e1 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.h
+++ b/src/northbridge/amd/agesa/family12/northbridge.h
@@ -23,4 +23,6 @@
static struct device_operations pci_domain_ops;
static struct device_operations cpu_bus_ops;
+device_t get_node_pci(u32 nodeid, u32 fn);
+
#endif /* NORTHBRIDGE_AMD_AGESA_FAM12H_H */