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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-05 18:20:36 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-09 21:30:14 +0200 |
| commit | d13b14723538dada8d88c1be30729531cf8fcc28 (patch) | |
| tree | 159d1ed78fbe18fb99ac0740fe672d790264f7dc /src/northbridge/amd/agesa | |
| parent | e0ee4c87e8c8b175f8e12dcf1c50342265b14677 (diff) | |
| download | coreboot-d13b14723538dada8d88c1be30729531cf8fcc28.tar.xz | |
northbridge/amd/agesa/family10: Remove commented code
Change-Id: I7966f996a4291cc6b97b53aba59b43358de94e45
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16886
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
| -rw-r--r-- | src/northbridge/amd/agesa/family10/northbridge.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 2c9f3aae28..449c5b4019 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -171,17 +171,6 @@ static void set_io_addr_reg(device_t dev, u32 nodeid, u32 linkn, u32 reg, pci_write_config32(__f1_dev[i], reg+4, tempreg); tempreg = 3 /*| (3<<4)*/ | ((io_min&0xf0)<<(12-4)); //base :ISA and VGA ? -#if 0 - // FIXME: can we use VGA reg instead? - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) { - printk(BIOS_SPEW, "%s, enabling legacy VGA IO forwarding for %s link %s\n", - __func__, dev_path(dev), link); - tempreg |= PCI_IO_BASE_VGA_EN; - } - if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_NO_ISA) { - tempreg |= PCI_IO_BASE_NO_ISA; - } -#endif for (i = 0; i < sysconf.nodes; i++) pci_write_config32(__f1_dev[i], reg, tempreg); } |