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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-02-27 23:45:20 +0100 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-28 00:00:30 +0100 |
| commit | fd611f9c2c8c751069c6cd1634a3e3e523ff098b (patch) | |
| tree | 3e1d3d844987a6f02d406e13f68aa37e3f55ec7e /src/northbridge/amd/agesa | |
| parent | 9c29cfae8cc6214478a0a555e6901779eb19ef54 (diff) | |
| download | coreboot-fd611f9c2c8c751069c6cd1634a3e3e523ff098b.tar.xz | |
Drop CONFIG_WRITE_HIGH_TABLES
It's been on for all boards per default since several years now
and the old code path probably doesn't even work anymore. Let's
just have one consistent way of doing things.
Change-Id: I58da7fe9b89a648d9a7165d37e0e35c88c06ac7e
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2547
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
5 files changed, 0 insertions, 20 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index cd21d9c341..e0c3255456 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -1036,7 +1036,6 @@ static void amdfam10_domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA @@ -1048,7 +1047,6 @@ static void amdfam10_domain_set_resources(device_t dev) printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", (u32)(high_tables_size / 1024), high_tables_base); } -#endif } basek = mmio_basek; } @@ -1063,7 +1061,6 @@ static void amdfam10_domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", i, mmio_basek, basek, limitk); if (high_tables_base==0) { @@ -1075,7 +1072,6 @@ static void amdfam10_domain_set_resources(device_t dev) #endif high_tables_size = HIGH_MEMORY_SIZE; } -#endif } #if CONFIG_GFXUMA diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 1467fdcfd2..2ef556324a 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -722,7 +722,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n"); ram_resource(dev, idx, basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA @@ -735,7 +734,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n"); (u32)(high_tables_size / 1024), high_tables_base); } -#endif } basek = mmio_basek; @@ -751,7 +749,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n"); ram_resource(dev, (idx | 0), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, mmio_basek, basek, limitk); if (high_tables_base==0) { @@ -764,7 +761,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n"); #endif high_tables_size = HIGH_MEMORY_SIZE; } -#endif } printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n", diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index c1685ec00c..3d46ad7756 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -716,7 +716,6 @@ static void domain_set_resources(device_t dev) pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base == 0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA @@ -728,7 +727,6 @@ static void domain_set_resources(device_t dev) printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", (u32)(high_tables_size / 1024), high_tables_base); } -#endif } basek = mmio_basek; @@ -743,7 +741,6 @@ static void domain_set_resources(device_t dev) ram_resource(dev, (idx | 0), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0, mmio_basek, basek, limitk); @@ -757,7 +754,6 @@ static void domain_set_resources(device_t dev) #endif high_tables_size = HIGH_MEMORY_SIZE; } -#endif } printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek); printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n", diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 5cd76a33cc..36e1499fa3 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -807,7 +807,6 @@ static void domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA @@ -819,7 +818,6 @@ static void domain_set_resources(device_t dev) printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", (u32)(high_tables_size / 1024), high_tables_base); } -#endif } basek = mmio_basek; } @@ -834,7 +832,6 @@ static void domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", i, mmio_basek, basek, limitk); if (high_tables_base==0) { @@ -846,7 +843,6 @@ static void domain_set_resources(device_t dev) #endif high_tables_size = HIGH_MEMORY_SIZE; } -#endif } #if CONFIG_GFXUMA diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 144dde726f..90f8345a57 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -793,7 +793,6 @@ static void domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; -#if CONFIG_WRITE_HIGH_TABLES if (high_tables_base==0) { /* Leave some space for ACPI, PIRQ and MP tables */ #if CONFIG_GFXUMA @@ -805,7 +804,6 @@ static void domain_set_resources(device_t dev) printk(BIOS_DEBUG, " split: %dK table at =%08llx\n", (u32)(high_tables_size / 1024), high_tables_base); } -#endif } basek = mmio_basek; } @@ -820,7 +818,6 @@ static void domain_set_resources(device_t dev) ram_resource(dev, (idx | i), basek, sizek); idx += 0x10; -#if CONFIG_WRITE_HIGH_TABLES printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", i, mmio_basek, basek, limitk); if (high_tables_base==0) { @@ -832,7 +829,6 @@ static void domain_set_resources(device_t dev) #endif high_tables_size = HIGH_MEMORY_SIZE; } -#endif } #if CONFIG_GFXUMA |