diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/northbridge/amd/amdfam10/early_ht.c | |
parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) | |
download | coreboot-0867062412dd4bfe5a556e5f3fd85ba5b682d79b.tar.xz |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdfam10/early_ht.c')
-rw-r--r-- | src/northbridge/amd/amdfam10/early_ht.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index 43774ded3e..b1c21f2dd3 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -21,7 +21,7 @@ // mmconf is not ready yet static void set_bsp_node_CHtExtNodeCfgEn(void) { -#if EXT_RT_TBL_SUPPORT == 1 +#if CONFIG_EXT_RT_TBL_SUPPORT == 1 u32 dword; dword = pci_io_read_config32(PCI_DEV(0, 0x18, 0), 0x68); dword |= (1<<27) | (1<<25); @@ -34,14 +34,14 @@ static void set_bsp_node_CHtExtNodeCfgEn(void) /* CHtExtAddrEn */ pci_io_write_config32(PCI_DEV(0, 0x18, 0), 0x68, dword); - // CPU on bus 0xff and 0xfe now. For now on we can use CBB and CDB. + // CPU on bus 0xff and 0xfe now. For now on we can use CONFIG_CBB and CONFIG_CDB. #endif } static void enumerate_ht_chain(void) { -#if HT_CHAIN_UNITID_BASE != 0 -/* HT_CHAIN_UNITID_BASE could be 0 (only one ht device in the ht chain), +#if CONFIG_HT_CHAIN_UNITID_BASE != 0 +/* CONFIG_HT_CHAIN_UNITID_BASE could be 0 (only one ht device in the ht chain), if so, don't need to go through the chain */ /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. @@ -50,16 +50,16 @@ static void enumerate_ht_chain(void) * links needs to be programed to point at bus 0. */ unsigned next_unitid, last_unitid = 0; -#if HT_CHAIN_END_UNITID_BASE != 0x20 +#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 // let't record the device of last ht device, So we can set the - // Unitid to HT_CHAIN_END_UNITID_BASE + // Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE unsigned real_last_unitid = 0; u8 real_last_pos = 0; int ht_dev_num = 0; // except host_bridge u8 end_used = 0; #endif - next_unitid = HT_CHAIN_UNITID_BASE; + next_unitid = CONFIG_HT_CHAIN_UNITID_BASE; do { u32 id; u8 hdr_type, pos; @@ -99,10 +99,10 @@ static void enumerate_ht_chain(void) unsigned ctrl, ctrl_off; device_t devx; -#if HT_CHAIN_END_UNITID_BASE != 0x20 +#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 if(next_unitid>=0x18) { if(!end_used) { - next_unitid = HT_CHAIN_END_UNITID_BASE; + next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE; end_used = 1; } else { goto out; @@ -112,7 +112,7 @@ static void enumerate_ht_chain(void) real_last_pos = pos; ht_dev_num++ ; #endif - #if HT_CHAIN_END_UNITID_BASE == 0 + #if CONFIG_HT_CHAIN_END_UNITID_BASE == 0 if (!next_unitid) goto out; #endif @@ -161,12 +161,12 @@ static void enumerate_ht_chain(void) } while(last_unitid != next_unitid); out: ; -#if HT_CHAIN_END_UNITID_BASE != 0x20 - if((ht_dev_num>1) && (real_last_unitid != HT_CHAIN_END_UNITID_BASE) && !end_used) { +#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 + if((ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) { u16 flags; flags = pci_io_read_config16(PCI_DEV(0,real_last_unitid,0), real_last_pos + PCI_CAP_FLAGS); flags &= ~0x1f; - flags |= HT_CHAIN_END_UNITID_BASE & 0x1f; + flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f; pci_io_write_config16(PCI_DEV(0, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags); } #endif |