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author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:36:02 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:28:51 +0200 |
commit | 5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (patch) | |
tree | 8d51ad99d2d9469f195694b29a571facf18d89f8 /src/northbridge/amd/amdfam10/reset_test.c | |
parent | 2b010b8795de84b6753c5e49d6a73c25fee96da1 (diff) | |
download | coreboot-5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9.tar.xz |
northbridge/amd: Add required space before opening parenthesis '('
Change-Id: Ic85f725bbdf72fbac5a4d9482c61343c5eb35e25
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16305
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10/reset_test.c')
-rw-r--r-- | src/northbridge/amd/amdfam10/reset_test.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c index 0ed4ffdf85..bdf70b56b2 100644 --- a/src/northbridge/amd/amdfam10/reset_test.c +++ b/src/northbridge/amd/amdfam10/reset_test.c @@ -90,7 +90,7 @@ void set_bios_reset(void) nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1; - for(i = 0; i < nodes; i++) { + for (i = 0; i < nodes; i++) { dev = NODE_PCI(i,0); htic = pci_read_config32(dev, HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; @@ -110,7 +110,7 @@ static u8 node_link_to_bus(u8 node, u8 link) // node are 6 bit, and link three b // put node and link in correct bit val = ((node & 0x0f)<<4) | ((node & 0x30)<< (12-4)) | ((link & 0x07)<<8) ; - for(reg = 0xE0; reg < 0xF0; reg += 0x04) { + for (reg = 0xE0; reg < 0xF0; reg += 0x04) { u32 config_map; config_map = pci_io_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 1), reg); if ((config_map & 3) != 3) { |