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authorElyes HAOUAS <ehaouas@noos.fr>2018-06-09 11:59:00 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-14 09:32:34 +0000
commitb0f1988f893bf5f581917816b11e810309955143 (patch)
treec4bcf6f1d9384b99cfcbfab4426de9f9f106e720 /src/northbridge/amd/amdfam10/resourcemap.c
parent68c851bcd702e7816cdb6e504f7386ec404ecf13 (diff)
downloadcoreboot-b0f1988f893bf5f581917816b11e810309955143.tar.xz
src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10/resourcemap.c')
-rw-r--r--src/northbridge/amd/amdfam10/resourcemap.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdfam10/resourcemap.c b/src/northbridge/amd/amdfam10/resourcemap.c
index be6f0ef062..5db6886e41 100644
--- a/src/northbridge/amd/amdfam10/resourcemap.c
+++ b/src/northbridge/amd/amdfam10/resourcemap.c
@@ -123,7 +123,7 @@ static void setup_default_resource_map(void)
* [31: 8] Memory-Mapped I/O Limit Address i (39-16)
* This field defines the upp adddress bits of a 40-bit
* address that defines the end of a memory-mapped
- * I/O region n
+ * I/O region n
*/
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x84), 0x00000048, 0x00000000,
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x8C), 0x00000048, 0x00000000,
@@ -158,7 +158,7 @@ static void setup_default_resource_map(void)
* [ 7: 4] Reserved
* [31: 8] Memory-Mapped I/O Base Address i (39-16)
* This field defines the upper address bits of a 40bit
- * address that defines the start of memory-mapped
+ * address that defines the start of memory-mapped
* I/O region i
*/
PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,