diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-19 08:29:41 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 02:08:42 +0000 |
commit | c99d3afe3e78565937c215f882bd4b7fc586f66e (patch) | |
tree | 4883a3ae5d65c369c5c85abae73cc1946f0a2c76 /src/northbridge/amd/amdfam10 | |
parent | 1e02d73c73f6f59f66c198b8c2afe77b0a730b01 (diff) | |
download | coreboot-c99d3afe3e78565937c215f882bd4b7fc586f66e.tar.xz |
amdfam10: Remove use of __PRE_RAM__
Change-Id: I4215b27332034a3c07052db92e4abae55c3fe967
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10.h | 7 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10_util.c | 9 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/util.c | 3 |
3 files changed, 5 insertions, 14 deletions
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 321e87d7d0..96938b2c63 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -922,13 +922,11 @@ that are corresponding to 0x01, 0x02, 0x03, 0x05, 0x06, 0x07 #include "nums.h" -#ifdef __PRE_RAM__ #if NODE_NUMS == 64 #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) #else #define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn) #endif -#endif /* Include wrapper for MCT (works for DDR2 or DDR3) */ #include <northbridge/amd/amdmct/wrappers/mcti.h> @@ -989,11 +987,8 @@ struct sys_info { struct DCTStatStruc DCTstatA[NODE_NUMS]; } __packed; -#ifndef __PRE_RAM__ struct device *get_node_pci(u32 nodeid, u32 fn); -#endif -#ifdef __PRE_RAM__ void showallroutes(int level, pci_devfn_t dev); void setup_resource_map_offset(const u32 *register_values, u32 max, u32 @@ -1017,8 +1012,6 @@ u32 get_sblk(void); u8 get_sbbusn(u8 sblk); void set_bios_reset(void); -#endif - #include "northbridge/amd/amdht/porting.h" BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List); diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c index 292049eff9..3e8c2fbeac 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_util.c +++ b/src/northbridge/amd/amdfam10/amdfam10_util.c @@ -14,15 +14,14 @@ * GNU General Public License for more details. */ -#include <console/console.h> - #include <arch/cpu.h> +#include <console/console.h> +#include <device/pci_ops.h> +#include <device/pci_def.h> #include "raminit.h" #include <northbridge/amd/amdmct/amddefs.h> -#ifndef __PRE_RAM__ -#include <include/device/pci_ops.h> -#include <include/device/pci_def.h> +#ifndef __SIMPLE_DEVICE__ u32 Get_NB32(u32 dev, u32 reg) { return pci_read_config32(pcidev_path_on_root(PCI_DEV2DEVFN(dev)), reg); diff --git a/src/northbridge/amd/amdfam10/util.c b/src/northbridge/amd/amdfam10/util.c index 39c2bfb4b2..ed5556ff70 100644 --- a/src/northbridge/amd/amdfam10/util.c +++ b/src/northbridge/amd/amdfam10/util.c @@ -21,11 +21,10 @@ * It can be called after RAM is set up by including amdfam10.h and enabling the * compilation of this file in src/northbridge/amd/amdfam10/Makefile.inc. */ -#ifndef __PRE_RAM__ #include <console/console.h> #include <device/pci.h> #include <device/pci_ops.h> -#endif + #include "amdfam10.h" /* Function 1 */ |