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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-12-11 12:58:07 -0600
committerMartin Roth <martinroth@google.com>2015-12-13 02:20:12 +0100
commit16ff807ba6444a0eea02c8929b73a5c3701ec16d (patch)
tree565dc6c8248e475cee55aed71b09f83698a91ab5 /src/northbridge/amd/amdfam10
parented4aa043c6c2ca92f4dce4d8239b9d29e2c9d8d3 (diff)
downloadcoreboot-16ff807ba6444a0eea02c8929b73a5c3701ec16d.tar.xz
amd/[nb/fam10|sb/sr5650]: Minor cosmetic changes
Change-Id: Ia9cb4fe4f46327e38648f89da0ffce647fb118d3 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12712 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index c8bf8fab52..58507d0866 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -737,16 +737,16 @@ static void amdfam10_domain_read_resources(device_t dev)
pci_domain_read_resources(dev);
-#if CONFIG_MMCONF_SUPPORT
- struct resource *res = new_resource(dev, 0xc0010058);
- res->base = CONFIG_MMCONF_BASE_ADDRESS;
- res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
- res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
- IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
- /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */
- ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10);
-#endif
+ if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) {
+ struct resource *res = new_resource(dev, 0xc0010058);
+ res->base = CONFIG_MMCONF_BASE_ADDRESS;
+ res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
+ res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+
+ /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */
+ ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10);
+ }
if (is_fam15h()) {
enable_cc6 = 0;