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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-03 11:38:27 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-04 17:18:57 +0000
commit9e7ac6b0345f5c4b3e75a0bdbd0f38444b503fd0 (patch)
tree4cdd0ca27ede0c7c256c3117d7d02fbf3328b5d0 /src/northbridge/amd/amdfam10
parent031dc67a6181fa9be015fd1bc4cab2fa1d3fcab5 (diff)
downloadcoreboot-9e7ac6b0345f5c4b3e75a0bdbd0f38444b503fd0.tar.xz
amdfam10 boards: Drop AMD_SB_CIMX
Copy-paste, boards do not set this. Change-Id: I4c0795a483948b1e357388a5ad639c3f1950bbc8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 4da5228666..245e3abb99 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -49,10 +49,6 @@
#include <cpu/amd/model_10xxx_rev.h>
#endif
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
-#include <sb_cimx.h>
-#endif
-
#if IS_ENABLED(CONFIG_DIMM_DDR3)
#include "../amdmct/mct_ddr3/s3utils.h"
#endif
@@ -1948,10 +1944,6 @@ static void cpu_bus_init(struct device *dev)
detect_and_enable_probe_filter(dev);
detect_and_enable_cache_partitioning(dev);
initialize_cpus(dev->link_list);
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
- sb_After_Pci_Init();
- sb_Mid_Post_Init();
-#endif
}
static struct device_operations cpu_bus_ops = {