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authorZheng Bao <zheng.bao@amd.com>2011-04-19 06:40:56 +0000
committerZheng Bao <Zheng.Bao@amd.com>2011-04-19 06:40:56 +0000
commitb18f9b0ff47df16d076c17b0a5ce6e1957984562 (patch)
treee21704227bb233c874ea918fad3dab55f4c41a37 /src/northbridge/amd/amdht
parent52ffb2b66d3c7400f5338901129c3066913b3d54 (diff)
downloadcoreboot-b18f9b0ff47df16d076c17b0a5ce6e1957984562.tar.xz
The "temp" will be used later. So it has to be calculated correctly.
Comment by Peter, The variable name "temp" unfortunately does not explain what the value is. The commit message also does not have hints. Hopefully in the future it's possible to also use a brief moment to improve the clarity of the code, while it is already being fixed for some other reason. Ie. fixing up variable names, writing particularly informative commit messages, or of course both at the same time! :) Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6517 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdht')
-rw-r--r--src/northbridge/amd/amdht/h3ncmn.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c
index 4b8b4950c9..b7e652012f 100644
--- a/src/northbridge/amd/amdht/h3ncmn.c
+++ b/src/northbridge/amd/amdht/h3ncmn.c
@@ -565,7 +565,8 @@ static u8 fam10GetNumCoresOnNode(u8 node, cNorthBridge *nb)
/* bits[15,13,12] specify the cores */
/* Support Downcoring */
- cores = ((temp & 8) >> 1) + (temp & 3) + 1;
+ temp = ((temp & 8) >> 1) + (temp & 3);
+ cores = temp + 1;
AmdPCIReadBits (MAKE_SBDFO(makePCISegmentFromNode(node),
makePCIBusFromNode(node),
makePCIDeviceFromNode(node),