diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-02 11:56:39 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-04 19:15:55 +0200 |
| commit | 7db506c3dd70f9ac0e8cdc481a47fa3835538be2 (patch) | |
| tree | 954275c199955bdee8b7b0d08aaba698e230f34e /src/northbridge/amd/amdht | |
| parent | fb190ed764450208c393a43da4ab15b0f9ccbe58 (diff) | |
| download | coreboot-7db506c3dd70f9ac0e8cdc481a47fa3835538be2.tar.xz | |
src/northbridge: Remove unnecessary whitespace
Change-Id: Ib06ecd083f00c74f1d227368811729d2944dd1ef
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16851
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdht')
| -rw-r--r-- | src/northbridge/amd/amdht/h3finit.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdht/ht_wrapper.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index b4838b44d5..2baf886c31 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -1541,7 +1541,7 @@ static void selectOptimalWidthAndFrequency(sMainData *pDat) pDat->PortList[i+1].CompositeFrequencyCap = temp; ASSERT (temp != 0); - for (j = 19; ; j--) + for (j = 19;; j--) { if ((j == 16) || (j == 15)) continue; @@ -1691,7 +1691,7 @@ static void hammerSublinkFixup(sMainData *pDat) pDat->PortList[hiIndex].CompositeFrequencyCap = temp; pDat->PortList[hiIndex+1].CompositeFrequencyCap = temp; - for (k = 19; ; k--) + for (k = 19;; k--) { if ((j == 16) || (j == 15)) continue; diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index 169b4b3369..4c68f41337 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -73,7 +73,7 @@ static u32 get_nodes(void) u32 nodes; dev = PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0); - nodes = ((pci_read_config32(dev, 0x60)>>4) & 7) ; + nodes = ((pci_read_config32(dev, 0x60)>>4) & 7); #if CONFIG_MAX_PHYSICAL_CPUS > 8 nodes += (((pci_read_config32(dev, 0x160)>>4) & 7)<<3); #endif |