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author | David W. Hendricks <dwh@lanl.gov> | 2004-02-09 22:47:38 +0000 |
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committer | David W. Hendricks <dwh@lanl.gov> | 2004-02-09 22:47:38 +0000 |
commit | 854e45292b71a0f2777d8ec2edc0d9d6fd1326bf (patch) | |
tree | 7b89d727bc6ff8f42389b419d1cbdf4d7e943af1 /src/northbridge/amd/amdk8/coherent_ht.c | |
parent | c34d5ca790c5cad0c6366122b56fd8da02c5794a (diff) | |
download | coreboot-854e45292b71a0f2777d8ec2edc0d9d6fd1326bf.tar.xz |
final merge of YhLu's stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8/coherent_ht.c')
-rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 61880ec5f6..83e8404e94 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -100,6 +100,42 @@ static void disable_probes(void) print_debug("done.\r\n"); } +//BY LYH +#if 0 +#define WAIT_TIMES 1000 +static void wait_ap_stop(u8 node) +{ + unsigned long reg; + unsigned long i; + for(i=0;i<WAIT_TIMES;i++) { + unsigned long regx; + regx = pci_read_config32(NODE_HT(node),0x6c); + if((regx & (1<<4))==1) break; + } + reg = pci_read_config32(NODE_HT(node),0x6c); + reg &= ~(1<<4); // clear it + pci_write_config32(NODE_HT(node), 0x6c, reg); + +} +static void notify_bsp_ap_is_stopped(void) +{ + unsigned long reg; + unsigned long apic_id; + apic_id = *((volatile unsigned long *)(APIC_DEFAULT_BASE+APIC_ID)); + apic_id >>= 24; +/* print_debug("applicaton cpu apic_id: "); + print_debug_hex32(apic_id); + }*/ + if(apic_id!=0) { //AP apic_id == node_id ?? +// set the ColdResetbit to notify BSP that AP is stopped + reg = pci_read_config32(NODE_HT(apic_id), 0x6C); + reg |= 1<<4; + pci_write_config32(NODE_HT(apic_id), 0x6C, reg); + } + +} +#endif +//BY LYH END static void enable_routing(u8 node) { @@ -152,6 +188,15 @@ static void rename_temp_node(u8 node) val |= node; /* new node */ pci_write_config32(NODE_HT(7), 0x60, val); +//BY LYH +#if 0 + if(node!=0) { + wait_ap_stop(node); + } +#endif +//BY LYH END + + print_debug(" done.\r\n"); |