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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:36:02 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:28:51 +0200 |
| commit | 5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (patch) | |
| tree | 8d51ad99d2d9469f195694b29a571facf18d89f8 /src/northbridge/amd/amdk8/raminit_f.c | |
| parent | 2b010b8795de84b6753c5e49d6a73c25fee96da1 (diff) | |
| download | coreboot-5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9.tar.xz | |
northbridge/amd: Add required space before opening parenthesis '('
Change-Id: Ic85f725bbdf72fbac5a4d9482c61343c5eb35e25
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16305
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdk8/raminit_f.c')
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index 8ed0335703..765fea1f15 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -1647,7 +1647,7 @@ static uint8_t get_exact_divisor(int i, uint8_t divisor) /* Check for FID control support */ struct cpuid_result cpuid1; cpuid1 = cpuid(0x80000007); - if( cpuid1.edx & 0x02 ) { + if ( cpuid1.edx & 0x02 ) { /* Use current FID */ unsigned fid_cur; msr = rdmsr(0xc0010042); @@ -3118,7 +3118,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl, if ((loops & 1023) == 0) { printk(BIOS_DEBUG, "."); } - } while(((dcl & DCL_InitDram) != 0) && (loops < TIMEOUT_LOOPS)); + } while (((dcl & DCL_InitDram) != 0) && (loops < TIMEOUT_LOOPS)); if (loops >= TIMEOUT_LOOPS) { printk(BIOS_DEBUG, " failed\n"); continue; @@ -3127,7 +3127,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl, /* Wait until it is safe to touch memory */ do { dcm = pci_read_config32(ctrl[i].f2, DRAM_CTRL_MISC); - } while(((dcm & DCM_MemClrStatus) == 0) /* || ((dcm & DCM_DramEnabled) == 0)*/ ); + } while (((dcm & DCM_MemClrStatus) == 0) /* || ((dcm & DCM_DramEnabled) == 0)*/ ); #if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1 if (cpu_f0_f1[i]) { |