diff options
author | Patrick Georgi <patrick@georgi-clan.de> | 2010-11-05 22:59:49 +0000 |
---|---|---|
committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-11-05 22:59:49 +0000 |
commit | 00e1460a8367c4199358034064329abcfb7e5c28 (patch) | |
tree | 4f72341d8a0289da33649570503f2dce3b0426a9 /src/northbridge/amd/amdk8 | |
parent | d51122df4e0bb23758a497268efaccc4fc1ddd75 (diff) | |
download | coreboot-00e1460a8367c4199358034064329abcfb7e5c28.tar.xz |
Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6028 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdk8')
-rw-r--r-- | src/northbridge/amd/amdk8/Kconfig | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 30 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/raminit_f.c | 26 |
3 files changed, 28 insertions, 32 deletions
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index e3a71c1a5e..4146239e0d 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -49,6 +49,10 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n +config QRANK_DIMM_SUPPORT + bool + default n + if K8_REV_F_SUPPORT config DIMM_DDR2 diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index b6d9fef06e..9e0ebfb2cd 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -18,10 +18,6 @@ # error "CONFIG_RAMTOP must be a power of 2" #endif -#ifndef QRANK_DIMM_SUPPORT -#define QRANK_DIMM_SUPPORT 0 -#endif - void setup_resource_map(const unsigned int *register_values, int max) { int i; @@ -595,7 +591,7 @@ struct dimm_size { unsigned long side2; unsigned long rows; unsigned long col; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT unsigned long rank; #endif }; @@ -609,7 +605,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device) sz.side2 = 0; sz.rows = 0; sz.col = 0; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT sz.rank = 0; #endif @@ -653,7 +649,7 @@ static struct dimm_size spd_get_dimm_size(unsigned device) if ((value != 2) && (value != 4 )) { goto val_err; } -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT sz.rank = value; #endif @@ -682,7 +678,7 @@ hw_err: sz.side2 = 0; sz.rows = 0; sz.col = 0; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT sz.rank = 0; #endif out: @@ -730,7 +726,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz /* Set the appropriate DIMM base address register */ pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+0)<<2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+1)<<2), base1); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz.rank == 4) { pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+4)<<2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+5)<<2), base1); @@ -741,7 +737,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, struct dimm_size sz if (base0) { dch = pci_read_config32(ctrl->f2, DRAM_CONFIG_HIGH); dch |= DCH_MEMCLK_EN0 << index; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz.rank == 4) { dch |= DCH_MEMCLK_EN0 << (index + 2); } @@ -763,7 +759,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz, map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP); map &= ~(0xf << (index * 4)); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz.rank == 4) { map &= ~(0xf << ( (index + 2) * 4)); } @@ -774,7 +770,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz, if (sz.side1 >= (25 +3)) { if (is_cpu_pre_d0()) { map |= (sz.side1 - (25 + 3)) << (index *4); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz.rank == 4) { map |= (sz.side1 - (25 + 3)) << ( (index + 2) * 4); } @@ -782,7 +778,7 @@ static void set_dimm_map(const struct mem_controller *ctrl, struct dimm_size sz, } else { map |= cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << (index*4); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz.rank == 4) { map |= cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << ( (index + 2) * 4); } @@ -1526,7 +1522,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller * } #if 0 //down speed for full load 4 rank support -#if QRANK_DIMM_SUPPORT +#if CONFIG_QRANK_DIMM_SUPPORT if (dimm_mask == (3|(3<<DIMM_SOCKETS)) ) { int ranks = 4; for (i = 0; (i < 4) && (ctrl->channel0[i]); i++) { @@ -1793,7 +1789,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa { uint32_t dcl; int value; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT int rank; #endif int dimm; @@ -1802,7 +1798,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa return -1; } -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT rank = spd_read_byte(ctrl->channel0[i], 5); /* number of physical banks */ if (rank < 0) { return -1; @@ -1810,7 +1806,7 @@ static int update_dimm_x4(const struct mem_controller *ctrl, const struct mem_pa #endif dimm = 1<<(DCL_x4DIMM_SHIFT+i); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (rank==4) { dimm |= 1<<(DCL_x4DIMM_SHIFT+i+2); } diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c index 916f04d67b..218acd0890 100644 --- a/src/northbridge/amd/amdk8/raminit_f.c +++ b/src/northbridge/amd/amdk8/raminit_f.c @@ -32,10 +32,6 @@ #include "option_table.h" #endif -#ifndef QRANK_DIMM_SUPPORT -#define QRANK_DIMM_SUPPORT 0 -#endif - #if CONFIG_DEBUG_RAM_SETUP #define printk_raminit(fmt, arg...) printk(BIOS_DEBUG, fmt, arg) #else @@ -870,7 +866,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, /* Set the appropriate DIMM base address register */ pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 0) << 2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 1) << 2), base1); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz->rank == 4) { pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 4) << 2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 5) << 2), base1); @@ -898,7 +894,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, } else { dword = pci_read_config32(ctrl->f2, DRAM_TIMING_LOW); //Channel A dword &= ~(ClkDis0 >> index); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz->rank == 4) { dword &= ~(ClkDis0 >> (index+2)); } @@ -908,7 +904,7 @@ static void set_dimm_size(const struct mem_controller *ctrl, if (meminfo->is_Width128) { // ChannelA+B dword = pci_read_config32(ctrl->f2, DRAM_CTRL_MISC); dword &= ~(ClkDis0 >> index); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz->rank == 4) { dword &= ~(ClkDis0 >> (index+2)); } @@ -961,7 +957,7 @@ static void set_dimm_cs_map(const struct mem_controller *ctrl, } map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP); map &= ~(0xf << (index * 4)); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz->rank == 4) { map &= ~(0xf << ( (index + 2) * 4)); } @@ -972,7 +968,7 @@ static void set_dimm_cs_map(const struct mem_controller *ctrl, unsigned temp_map; temp_map = cs_map_aaa[(sz->bank-2)*3*4 + (sz->rows - 13)*3 + (sz->col - 9) ]; map |= temp_map << (index*4); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (sz->rank == 4) { map |= temp_map << ( (index + 2) * 4); } @@ -1312,7 +1308,7 @@ static long disable_dimm(const struct mem_controller *ctrl, unsigned index, } else { pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 0) << 2), 0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 1) << 2), 0); -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT if (meminfo->sz[index].rank == 4) { pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 4) << 2), 0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1) + 5) << 2), 0); @@ -2194,7 +2190,7 @@ static int update_dimm_Tref(const struct mem_controller *ctrl, static void set_4RankRDimm(const struct mem_controller *ctrl, const struct mem_param *param, struct mem_info *meminfo) { -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT int value; int i; long dimm_mask = meminfo->dimm_mask; @@ -2234,7 +2230,7 @@ static uint32_t get_extra_dimm_mask(const struct mem_controller *ctrl, uint32_t mask_single_rank; uint32_t mask_page_1k; int value; -#if QRANK_DIMM_SUPPORT == 1 +#if CONFIG_QRANK_DIMM_SUPPORT int rank; #endif @@ -2267,20 +2263,20 @@ static uint32_t get_extra_dimm_mask(const struct mem_controller *ctrl, value = spd_read_byte(spd_device, SPD_PRI_WIDTH); - #if QRANK_DIMM_SUPPORT == 1 + #if CONFIG_QRANK_DIMM_SUPPORT rank = meminfo->sz[i].rank; #endif if (value==4) { mask_x4 |= (1<<i); - #if QRANK_DIMM_SUPPORT == 1 + #if CONFIG_QRANK_DIMM_SUPPORT if (rank==4) { mask_x4 |= 1<<(i+2); } #endif } else if (value==16) { mask_x16 |= (1<<i); - #if QRANK_DIMM_SUPPORT == 1 + #if CONFIG_QRANK_DIMM_SUPPORT if (rank==4) { mask_x16 |= 1<<(i+2); } |